Mark class method pforms with their pform class.

PFunction.cc

@@ -22,7 +22,7 @@
 # include <cassert>
 
 PFunction::PFunction(perm_string name, LexicalScope*parent, bool is_auto__)
-: PScope(name, parent), ports_(0), statement_(0)
+: PScope(name, parent), this_type_(0), ports_(0), statement_(0)
 {
       is_auto_ = is_auto__;
       return_type_.type = PTF_NONE;
@@ -32,6 +32,12 @@ PFunction::~PFunction()
 {
 }
 
+void PFunction::set_this(class_type_t*use_type)
+{
+      assert(this_type_ == 0);
+      this_type_ = use_type;
+}
+
 void PFunction::set_ports(vector<PWire *>*p)
 {
       assert(ports_ == 0);

parse.y

@@ -1022,6 +1022,7 @@ function_declaration /* IEEE1800-2005: A.2.6 */
       { current_function->set_ports($7);
 	current_function->set_return($3);
 	current_function_set_statement($8? @8 : @4, $8);
+	pform_set_this_class(current_function);
 	pform_pop_scope();
 	current_function = 0;
       }
@@ -1048,6 +1049,7 @@ function_declaration /* IEEE1800-2005: A.2.6 */
       { current_function->set_ports($7);
 	current_function->set_return($3);
 	current_function_set_statement($11? @11 : @4, $11);
+	pform_set_this_class(current_function);
 	pform_pop_scope();
 	current_function = 0;
 	if ($7==0 && !gn_system_verilog()) {
@@ -1507,6 +1509,7 @@ task_declaration /* IEEE1800-2005: A.2.7 */
     K_endtask
       { current_task->set_ports($6);
 	current_task_set_statement(@3, $7);
+	pform_set_this_class(current_task);
 	pform_pop_scope();
 	current_task = 0;
 	if ($7 && $7->size() > 1 && !gn_system_verilog()) {
@@ -1540,6 +1543,7 @@ task_declaration /* IEEE1800-2005: A.2.7 */
     K_endtask
       { current_task->set_ports($6);
 	current_task_set_statement(@3, $10);
+	pform_set_this_class(current_task);
 	pform_pop_scope();
 	current_task = 0;
 	if ($10) delete $10;
@@ -1569,10 +1573,13 @@ task_declaration /* IEEE1800-2005: A.2.7 */
     K_endtask
       { current_task->set_ports(0);
 	current_task_set_statement(@3, $9);
+	pform_set_this_class(current_task);
+	if (! current_task->method_of()) {
+	      cerr << @3 << ": warning: task definition for \"" << $3
+		   << "\" has an empty port declaration list!" << endl;
+	}
 	pform_pop_scope();
 	current_task = 0;
-	cerr << @3 << ": warning: task definition for \"" << $3
-	     << "\" has an empty port declaration list!" << endl;
 	if ($9->size() > 1 && !gn_system_verilog()) {
 	      yyerror(@9, "error: Task body with multiple statements requres SystemVerilog.");
 	}

pform.h

@@ -185,6 +185,8 @@ extern void pform_class_property(const struct vlltype&loc,
 				 property_qualifier_t pq,
 				 data_type_t*data_type,
 				 std::list<decl_assignment_t*>*decls);
+extern void pform_set_this_class(PFunction*net);
+extern void pform_set_this_class(PTask*net);
 extern void pform_end_class_declaration(void);
 
 extern void pform_make_udp(perm_string name, list<perm_string>*parms,

pform_dump.cc

@@ -908,6 +908,8 @@ void PFunction::dump(ostream&out, unsigned ind) const
       }
 
       out << pscope_name() << ";" << endl;
+      if (this_type_)
+	    out << setw(ind) << "" << "method of " << this_type_->name << ";" << endl;
 
       if (ports_)
 	    for (unsigned idx = 0 ;  idx < ports_->size() ;  idx += 1) {
@@ -947,6 +949,8 @@ void PTask::dump(ostream&out, unsigned ind) const
       out << setw(ind) << "" << "task ";
       if (is_auto_) cout << "automatic ";
       out << pscope_name() << ";" << endl;
+      if (this_type_)
+	    out << setw(ind) << "" << "method of " << this_type_->name << ";" << endl;
       if (ports_)
 	    for (unsigned idx = 0 ;  idx < ports_->size() ;  idx += 1) {
 		  if ((*ports_)[idx] == 0) {

pform_pclass.cc

@@ -72,6 +72,22 @@ void pform_class_property(const struct vlltype&loc,
       }
 }
 
+void pform_set_this_class(PFunction*net)
+{
+      if (pform_cur_class == 0)
+	    return;
+
+      net->set_this(pform_cur_class->type);
+}
+
+void pform_set_this_class(PTask*net)
+{
+      if (pform_cur_class == 0)
+	    return;
+
+      net->set_this(pform_cur_class->type);
+}
+
 void pform_end_class_declaration(void)
 {
       assert(pform_cur_class);