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Add unary OR/NOR 

These are currently implemented with reference to an external
Reduce_OR function
This commit is contained in:
Nick Gasson 2008-07-07 15:23:57 +01:00
parent dadd145d09
commit 4db5b9d7ed
2 changed files with 14 additions and 3 deletions
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15
tgt-vhdl/expr.cc
View File

@ -68,12 +68,23 @@ static vhdl_expr *translate_unary(ivl_expr_t e)
vhdl_expr *operand = translate_expr(ivl_expr_oper1(e));
if (NULL == operand)
return NULL;
switch (ivl_expr_opcode(e)) {
char opcode = ivl_expr_opcode(e);
switch (opcode) {
case '!':
case '~':
return new vhdl_unaryop_expr
(VHDL_UNARYOP_NOT, operand, new vhdl_type(*operand->get_type()));
case 'N': // NOR
case '|':
{
vhdl_fcall *f = new vhdl_fcall("Reduce_OR", vhdl_type::std_logic());
f->add_expr(operand);
if ('N' == opcode)
return new vhdl_unaryop_expr(VHDL_UNARYOP_NOT, f, vhdl_type::std_logic());
else
return f;
}
default:
error("No translation for unary opcode '%c'\n",
ivl_expr_opcode(e));

2
tgt-vhdl/scope.cc
View File

@ -164,7 +164,7 @@ static void declare_logic(vhdl_arch *arch, ivl_scope_t scope)
int nlogs = ivl_scope_logs(scope);
for (int i = 0; i < nlogs; i++) {
ivl_net_logic_t log = ivl_scope_log(scope, i);
// The output is always pin zero
ivl_nexus_t output = ivl_logic_pin(log, 0);
vhdl_var_ref *lhs =