diff --git a/tgt-vhdl/expr.cc b/tgt-vhdl/expr.cc
index 447857bf6..602dbb187 100644
--- a/tgt-vhdl/expr.cc
+++ b/tgt-vhdl/expr.cc
@@ -68,12 +68,23 @@ static vhdl_expr *translate_unary(ivl_expr_t e)
    vhdl_expr *operand = translate_expr(ivl_expr_oper1(e));
    if (NULL == operand)
       return NULL;
-      
-   switch (ivl_expr_opcode(e)) {
+
+   char opcode = ivl_expr_opcode(e);
+   switch (opcode) {
    case '!':
    case '~':
       return new vhdl_unaryop_expr
          (VHDL_UNARYOP_NOT, operand, new vhdl_type(*operand->get_type()));
+   case 'N':   // NOR
+   case '|':
+      {
+         vhdl_fcall *f = new vhdl_fcall("Reduce_OR", vhdl_type::std_logic());
+         f->add_expr(operand);
+         if ('N' == opcode)
+            return new vhdl_unaryop_expr(VHDL_UNARYOP_NOT, f, vhdl_type::std_logic());
+         else
+            return f;
+      }
    default:
       error("No translation for unary opcode '%c'\n",
             ivl_expr_opcode(e));
diff --git a/tgt-vhdl/scope.cc b/tgt-vhdl/scope.cc
index 802e94aa4..da356654d 100644
--- a/tgt-vhdl/scope.cc
+++ b/tgt-vhdl/scope.cc
@@ -164,7 +164,7 @@ static void declare_logic(vhdl_arch *arch, ivl_scope_t scope)
    int nlogs = ivl_scope_logs(scope);
    for (int i = 0; i < nlogs; i++) {
       ivl_net_logic_t log = ivl_scope_log(scope, i);
-
+      
       // The output is always pin zero
       ivl_nexus_t output = ivl_logic_pin(log, 0);
       vhdl_var_ref *lhs =