VHDL AST element for non-blocking assignment

tgt-vhdl/stmt.cc

@@ -65,7 +65,6 @@ static int draw_stask_display(vhdl_process *proc, ivl_statement_t stmt)
          if (NULL == base)
             return 1;
          
-         
          // Need to add a call to Type'Image for types not
          // supported by std.textio
          if (base->get_type()->get_name() != "String") {

tgt-vhdl/vhdl_element.cc

@@ -451,3 +451,10 @@ void vhdl_fcall::emit(std::ofstream &of, int level) const
    exprs_.emit(of, level);
 }
 
+void vhdl_nbassign_stmt::emit(std::ofstream &of, int level) const
+{
+   lhs_->emit(of, level);
+   of << " <= ";
+   rhs_->emit(of, level);
+   of << ";";
+}

tgt-vhdl/vhdl_element.hh

@@ -170,6 +170,21 @@ public:
 typedef std::list<vhdl_seq_stmt*> seq_stmt_list_t;
 
 
+/*
+ * Similar to Verilog non-blocking assignment, except the LHS
+ * must be a signal not a variable.
+ */
+class vhdl_nbassign_stmt : public vhdl_seq_stmt {
+public:
+   vhdl_nbassign_stmt(vhdl_var_ref *lhs, vhdl_expr *rhs)
+      : lhs_(lhs), rhs_(rhs) {}
+
+   void emit(std::ofstream &of, int level);
+private:
+   vhdl_var_ref *lhs_;
+   vhdl_expr *rhs_;
+};
+
 /*
  * Delay simulation indefinitely, until an event, or for a
  * specified time.