From 311ffb27f2133f9b0211cac814309422b2a02a67 Mon Sep 17 00:00:00 2001
From: Maciej Suminski <maciej.suminski@cern.ch>
Date: Tue, 23 Jun 2015 11:34:08 +0200
Subject: [PATCH] ivl: Enum output ports are implicit regs when based on
 'logic' type.

---
 parse.y | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/parse.y b/parse.y
index 5ea8250ab..bc866fea6 100644
--- a/parse.y
+++ b/parse.y
@@ -4169,6 +4169,9 @@ port_declaration
 		    use_type = NetNet::IMPLICIT_REG;
 	      } else if (dynamic_cast<struct_type_t*> ($4)) {
 		    use_type = NetNet::IMPLICIT_REG;
+	      } else if (enum_type_t*etype = dynamic_cast<enum_type_t*> ($4)) {
+		    if(etype->base_type == IVL_VT_LOGIC)
+			use_type = NetNet::IMPLICIT_REG;
 	      }
 	}
 	ptmp = pform_module_port_reference(name, @2.text, @2.first_line);