From 253f3bc660d946ec005b3997c104657bac1ff1bc Mon Sep 17 00:00:00 2001 From: steve Date: Thu, 26 Jun 2003 03:57:05 +0000 Subject: [PATCH] Add Xilinx support for A/B MUX devices. --- tgt-fpga/d-virtex.c | 7 ++++-- tgt-fpga/d-virtex2.c | 7 ++++-- tgt-fpga/xilinx.c | 55 +++++++++++++++++++++++++++++++++++++++++++- tgt-fpga/xilinx.h | 6 ++++- 4 files changed, 69 insertions(+), 6 deletions(-) diff --git a/tgt-fpga/d-virtex.c b/tgt-fpga/d-virtex.c index f3dda88ca..90bbbe920 100644 --- a/tgt-fpga/d-virtex.c +++ b/tgt-fpga/d-virtex.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: d-virtex.c,v 1.25 2003/06/25 02:55:57 steve Exp $" +#ident "$Id: d-virtex.c,v 1.26 2003/06/26 03:57:05 steve Exp $" #endif # include "device.h" @@ -670,7 +670,7 @@ const struct device_s d_virtex_edif = { virtex_eq, virtex_eq, virtex_ge, - 0, + xilinx_mux, virtex_add, virtex_add, xilinx_shiftl, @@ -680,6 +680,9 @@ const struct device_s d_virtex_edif = { /* * $Log: d-virtex.c,v $ + * Revision 1.26 2003/06/26 03:57:05 steve + * Add Xilinx support for A/B MUX devices. + * * Revision 1.25 2003/06/25 02:55:57 steve * Virtex and Virtex2 share much code. * diff --git a/tgt-fpga/d-virtex2.c b/tgt-fpga/d-virtex2.c index 932e0775d..c920e74e1 100644 --- a/tgt-fpga/d-virtex2.c +++ b/tgt-fpga/d-virtex2.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: d-virtex2.c,v 1.14 2003/06/25 02:55:57 steve Exp $" +#ident "$Id: d-virtex2.c,v 1.15 2003/06/26 03:57:05 steve Exp $" #endif # include "device.h" @@ -141,7 +141,7 @@ const struct device_s d_virtex2_edif = { virtex_eq, virtex_eq, virtex_ge, - 0, + xilinx_mux, virtex_add, virtex_add, xilinx_shiftl, /* show_shiftl */ @@ -151,6 +151,9 @@ const struct device_s d_virtex2_edif = { /* * $Log: d-virtex2.c,v $ + * Revision 1.15 2003/06/26 03:57:05 steve + * Add Xilinx support for A/B MUX devices. + * * Revision 1.14 2003/06/25 02:55:57 steve * Virtex and Virtex2 share much code. * diff --git a/tgt-fpga/xilinx.c b/tgt-fpga/xilinx.c index 3219c0a19..a2510ff16 100644 --- a/tgt-fpga/xilinx.c +++ b/tgt-fpga/xilinx.c @@ -17,7 +17,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: xilinx.c,v 1.2 2003/06/25 02:55:57 steve Exp $" +#ident "$Id: xilinx.c,v 1.3 2003/06/26 03:57:05 steve Exp $" #endif # include "edif.h" @@ -485,6 +485,56 @@ void xilinx_logic(ivl_net_logic_t net) } } +/* + * A fully generic Xilinx MUX is implemented entirely from LUT + * devices. + */ +void xilinx_mux(ivl_lpm_t net) +{ + unsigned idx; + + edif_cellref_t lut; + edif_joint_t jnt; + + assert(ivl_lpm_selects(net) == 1); + + /* A/B Mux devices are made from LUT3 devices. I0 is connected + to A, I1 to B, and I2 to the Select input. Create as many + as are needed to implement the requested width. + + S B A | Q + ------+-- + 0 0 0 | 0 + 0 0 1 | 1 + 0 1 0 | 0 + 0 1 1 | 1 + 1 0 0 | 0 + 1 0 1 | 0 + 1 1 0 | 1 + 1 1 1 | 1 + + INIT = "CA" */ + + for (idx = 0 ; idx < ivl_lpm_width(net) ; idx += 1) { + + lut = edif_cellref_create(edf, xilinx_cell_lut3(xlib)); + + jnt = edif_joint_of_nexus(edf, ivl_lpm_q(net, idx)); + edif_add_to_joint(jnt, lut, LUT_O); + + jnt = edif_joint_of_nexus(edf, ivl_lpm_data2(net, 0, idx)); + edif_add_to_joint(jnt, lut, LUT_I0); + + jnt = edif_joint_of_nexus(edf, ivl_lpm_data2(net, 1, idx)); + edif_add_to_joint(jnt, lut, LUT_I1); + + jnt = edif_joint_of_nexus(edf, ivl_lpm_select(net, 0)); + edif_add_to_joint(jnt, lut, LUT_I2); + + edif_cellref_pstring(lut, "INIT", "CA"); + } +} + /* * Any Xilinx device works with this adder. * Generic Xilinx add only works for single bit slices. @@ -682,6 +732,9 @@ void xilinx_shiftl(ivl_lpm_t net) /* * $Log: xilinx.c,v $ + * Revision 1.3 2003/06/26 03:57:05 steve + * Add Xilinx support for A/B MUX devices. + * * Revision 1.2 2003/06/25 02:55:57 steve * Virtex and Virtex2 share much code. * diff --git a/tgt-fpga/xilinx.h b/tgt-fpga/xilinx.h index 04fb29dee..26edc6491 100644 --- a/tgt-fpga/xilinx.h +++ b/tgt-fpga/xilinx.h @@ -19,7 +19,7 @@ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA */ #ifdef HAVE_CVS_IDENT -#ident "$Id: xilinx.h,v 1.2 2003/06/25 02:55:57 steve Exp $" +#ident "$Id: xilinx.h,v 1.3 2003/06/26 03:57:05 steve Exp $" #endif /* @@ -104,11 +104,15 @@ extern void virtex_add(ivl_lpm_t net); extern void xilinx_show_scope(ivl_scope_t scope); extern void xilinx_pad(ivl_signal_t, const char*str); extern void xilinx_logic(ivl_net_logic_t net); +extern void xilinx_mux(ivl_lpm_t net); extern void xilinx_add(ivl_lpm_t net); extern void xilinx_shiftl(ivl_lpm_t net); /* * $Log: xilinx.h,v $ + * Revision 1.3 2003/06/26 03:57:05 steve + * Add Xilinx support for A/B MUX devices. + * * Revision 1.2 2003/06/25 02:55:57 steve * Virtex and Virtex2 share much code. *