Fix module_output_port_list_def test

The module_output_port_list_def declares a output port with an implicit
data type and assigns an initial value to it. Since output ports with an
implicit data type are nets this test is not standard compliant.

This only works because at the moment the parser incorrectly flags all
output ports with an initial value as variables rather than following the
method defined by the standard to decide whether the port should be a net
or variable.

Make the test standard compliant by using an explicit data type for the
output port, in which case it will be a variable.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
This commit is contained in:
Lars-Peter Clausen 2022-09-14 22:17:23 +02:00
parent ffbcb30127
commit 1ee189630b
1 changed files with 1 additions and 1 deletions

View File

@ -2,7 +2,7 @@
// output port declaration list.
module M (
output [31:0] x = 1, y = 2
output reg [31:0] x = 1, y = 2
);
`define check(val, exp) \