vhdlpp: "resize" function.
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@ -560,12 +560,13 @@ int ExpFunc::emit(ostream&out, Entity*ent, ScopeBase*scope)
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{
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{
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int errors = 0;
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int errors = 0;
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// SystemVerilog takes care of signs, depending on the lvalue
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// SystemVerilog takes care of sign & width, depending on the lvalue type
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if (name_ == "to_integer" && argv_.size()==1) {
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if ((name_ == "to_integer" && argv_.size() == 1) ||
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(name_ == "resize" && argv_.size() == 2)) {
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errors += argv_[0]->emit(out, ent, scope);
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errors += argv_[0]->emit(out, ent, scope);
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}
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}
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else if (name_ == "unsigned" && argv_.size()==1) {
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else if (name_ == "unsigned" && argv_.size() == 1) {
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// Handle the special case that this is a cast to
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// Handle the special case that this is a cast to
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// unsigned. This function is brought in as part of the
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// unsigned. This function is brought in as part of the
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// std numeric library, but we interpret it as the same
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// std numeric library, but we interpret it as the same
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