Add regression test for case muxes with array word inputs

Check that synthesized case statement muxes can use array words as inputs.
This used to generate invalid VVP because .array/port statements were emitted
in the middle of .functor statements.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
This commit is contained in:
Lars-Peter Clausen 2026-06-20 15:30:10 -07:00
parent a5bf5e145f
commit 167a6bbcdb
3 changed files with 58 additions and 0 deletions

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@ -0,0 +1,52 @@
// Check that case statement muxes work with array word inputs.
module test;
reg [7:0] mem [0:3];
reg [1:0] sel;
reg [7:0] out;
reg failed;
`define check(val, exp) \
if (val !== exp) begin \
$display("FAILED(%0d). '%s' expected %b, got %b", `__LINE__, \
`"val`", exp, val); \
failed = 1'b1; \
end
always @* begin
case (sel)
2'd0: out = mem[0];
2'd1: out = mem[1];
2'd2: out = mem[2];
2'd3: out = mem[3];
endcase
end
(* ivl_synthesis_off *)
initial begin
failed = 1'b0;
mem[0] = 8'h12;
mem[1] = 8'h34;
mem[2] = 8'h56;
mem[3] = 8'h78;
sel = 2'd0;
#1 `check(out, 8'h12);
sel = 2'd1;
#1 `check(out, 8'h34);
sel = 2'd2;
#1 `check(out, 8'h56);
sel = 2'd3;
#1 `check(out, 8'h78);
if (!failed) begin
$display("PASSED");
end
end
endmodule

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@ -91,6 +91,7 @@ case1 vvp_tests/case1.json
case2 vvp_tests/case2.json
case2-S vvp_tests/case2-S.json
case3 vvp_tests/case3.json
case_mux_array_word vvp_tests/case_mux_array_word.json
casex_synth vvp_tests/casex_synth.json
cast_int_ams vvp_tests/cast_int_ams.json
cast_real_invalid1 vvp_tests/cast_real_invalid1.json

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@ -0,0 +1,5 @@
{
"type" : "normal",
"source" : "case_mux_array_word.v",
"iverilog-args" : [ "-S" ]
}