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vhdlpp: Invert range in ExpAggregate when necessary.

This commit is contained in:
Maciej Suminski 2014-08-22 16:23:22 +02:00
parent 0a2100c87f
commit 10446df80e
1 changed files with 2 additions and 1 deletions
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3
vhdlpp/expression_emit.cc
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@ -159,7 +159,8 @@ int ExpAggregate::emit_array_(ostream&out, Entity*ent, Architecture*arc, const V
ivl_assert(*this, rc); ivl_assert(*this, rc);
rc = rang.lsb()->evaluate(ent, arc, use_lsb); rc = rang.lsb()->evaluate(ent, arc, use_lsb);
ivl_assert(*this, rc); ivl_assert(*this, rc);
ivl_assert(*this, use_msb >= use_lsb); if(use_msb < use_lsb)
swap(use_msb, use_lsb);
map<int64_t,choice_element*> element_map; map<int64_t,choice_element*> element_map;
choice_element*element_other = 0; choice_element*element_other = 0;