Regression test for issue 576.

ivtest/ivltests/issue576.v

@@ -0,0 +1,15 @@
+
+// This example is rediculous, but legal. However, Icarus Verilog will print
+// various warnings about this. The warnings are OK, but Issue#576 saw this
+// program assert, which is worse.
+module test;
+   function void fun;
+      begin
+	 $display("PASSED");
+	 $finish;
+      end
+   endfunction // fun
+
+   always_comb fun;
+   
+endmodule

ivtest/regress-sv.list

@@ -622,3 +622,4 @@ br_gh436		normal,-g2012		ivltests gold=br_gh436.gold
 br_gh451		normal,-g2012,-Ptest.foo=4	ivltests gold=br_gh451.gold
 br_gh453		normal,-g2012		ivltests
 br_gh460		normal,-g2012		ivltests
+issue576		normal,-g2012		ivltests