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Fix the return type of the $bits system function (issue #1163) 

Early editions of the SystemVerilog standard did not specify the return
type for $bits, so we made it 32 bit unsigned 2-state. Later editions
state the return type is integer (32 bit signed 4-state), so make it so.
This commit is contained in:
Martin Whitaker 2024-09-07 17:52:28 +01:00
parent 34ed6f6f97
commit 0136db7ee7
1 changed files with 2 additions and 2 deletions
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4
elab_expr.cc
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@ -1437,10 +1437,10 @@ unsigned PECallFunction::test_width_sfunc_(Design*des, NetScope*scope,
expr->test_width(des, scope, arg_mode);
}
expr_type_ = IVL_VT_BOOL;
expr_type_ = IVL_VT_LOGIC;
expr_width_ = integer_width;
min_width_ = integer_width;
signed_flag_ = false;
signed_flag_ = true;
if (debug_elaborate)
cerr << get_fileline() << ": " << __func__ << ": "