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iverilog/vhdlpp/parse_wrap.h

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Parse create entities with ports Create entity objects from entity declarations in the source, and populate them with ports.
2011-01-03 07:30:09 +01:00
#ifndef __parse_wrap_H
#define __parse_wrap_H
/*
* Copyright (c) 2011 Stephen Williams (steve@icarus.com)
*
* This source code is free software; you can redistribute it
* and/or modify it in source code form under the terms of the GNU
* General Public License as published by the Free Software
* Foundation; either version 2 of the License, or (at your option)
* any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
updated FSF-address
2012-08-29 03:41:23 +02:00
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
Parse create entities with ports Create entity objects from entity declarations in the source, and populate them with ports.
2011-01-03 07:30:09 +01:00
*/
/*
* This header wraps the parse.h header file that is generated from
* the parse.y source file. This is used to include definitions that
* are needed by the parse type, etc.
*/
# include <list>
Added full number, based number (both int and float), string and character literals handling
2011-02-04 17:51:51 +01:00
# include "vhdlint.h"
Introductory changes for numbers handling
2011-01-31 18:25:29 +01:00
# include "vhdlreal.h"
Annotate the parse of simple concurrent statements.
2011-01-27 05:38:20 +01:00
# include "architec.h"
Add parse decorations for expressions. Elaboration will need a parse tree for expressions. Create one for the expression types that are currently supported. Also add rules and the keywords for all the remaining binary logical operators.
2011-01-30 02:27:30 +01:00
# include "expression.h"
Parse/decorate sequential statements. Get to the point where our sample program parses completely, and the sequential statements generate SequentialStmt objects and a process object in the architecture. Also add a few missing expression types.
2011-05-09 01:40:35 +02:00
# include "sequential.h"
Basic elaboration of vhdl component instantiations. This gets us as far as emiting a component instantiation. Very little error checking/elaboration is done, so there is room for improvement, but this is a working stub.
2011-04-01 03:50:48 +02:00
# include "parse_types.h"
Do type mapping in the parser. In VHDL, types are declared before they are used, so it is possible to do type binding during parse. This makes the parser a little bit cleaner.
2011-02-14 01:37:10 +01:00
class VType;
Parse create entities with ports Create entity objects from entity declarations in the source, and populate them with ports.
2011-01-03 07:30:09 +01:00
# include "parse.h"
#endif