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642 Commits 1 Branch 1 Tag 6.6 MiB
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97 Commits

Author SHA1 Message Date
David Shah eee9aac2e1 icebox: Allow selecting package in icebox_vlog 
Signed-off-by: David Shah <davey1576@gmail.com>
 2018-05-30 11:24:40 +02:00
Andrew Wygle 704348f563 Correct internal global buffers for lm4k 2018-05-13 11:00:40 -07:00
Andrew Wygle a34ef88b8e Added missing ieren entries for lm4k. 
Config SPI pins weren't present in ioctrl_lm4k.sh
 2018-05-13 11:00:26 -07:00
Andrew Wygle 2d571cb728 Support lm4k in icebox_chipdb.py. 2018-05-13 10:58:22 -07:00
Andrew Wygle 9c11606f1d Completed first pass at icebox support for lm4k. 
Needs testing.
 2018-05-12 21:47:09 -07:00
Andrew Wygle f35701f89a [WIP] Added colbuf and gbufin data for LM series 2018-05-12 21:47:09 -07:00
Andrew Wygle da18da271b [WIP] Add partial icebox support for lm4k. 2018-05-12 21:47:09 -07:00
David Shah 4f4409ad86 Add BG121 package variant and update docs 2018-04-02 15:01:45 +01:00
David Shah b024ef49da Add UltraPlus I³C IO to chipdb 2018-02-09 13:42:38 +00:00
David Shah 80dbd67e6c Add RGB driver outputs to chipdb 2018-02-09 09:42:08 +00:00
David Shah 7e587c9b6b Add 5k UWG30 ieren data to db 2018-01-16 15:17:20 +00:00
David Shah a59472812c Remove seperate 5k RAM DB and share with 8k instead 
This should ensure that the 5k RAM routing entries are now complete,
fixing #115
 2018-01-16 15:17:20 +00:00
David Shah 02a986b2f4 Add pinout for 5k UWG30 package 2018-01-16 15:17:20 +00:00
David Shah 77eafa89b4 HFOSC trimming info 2018-01-16 15:17:20 +00:00
David Shah 9e81ac7786 New UltraPlus corner tracing algorithm 2018-01-16 15:17:12 +00:00
David Shah 0932c559a7 Misc routing tweaks 2018-01-16 15:17:12 +00:00
David Shah ec3ad58683 Figure out missing SPI config bits, and add to chipdb 2018-01-16 15:16:44 +00:00
David Shah 70d295212a Chipdb fix for hard IP 2017-11-26 11:46:38 +00:00
David Shah 6f2d9def4f Add UltraPlus IP to chipdb 2017-11-24 18:49:28 +00:00
David Shah bd6cf518f3 Begin I2C/SPI IP reverse engineering 2017-11-23 19:45:27 +00:00
David Shah da7a2a9d0d Fix whitespace and a couple of typos 2017-11-20 09:43:54 +00:00
David Shah b059f37b50 Add all cf_bits and pullup strength notes 2017-11-18 15:38:14 +00:00
David Shah 095b8404e8 Remove non-existing routing resources (5k) 2017-11-17 15:10:04 +00:00
David Shah afcc653b78 Add support for UltraPlus SPRAM 2017-11-17 15:10:04 +00:00
David Shah c71db50a27 Add UltraPlus LED driver support and demo 2017-11-17 15:09:58 +00:00
David Shah e7d22f2277 UltraPlus Internal Oscillator support 2017-11-17 15:09:58 +00:00
David Shah cdf6883639 UltraPlus DSPs working 2017-11-17 15:09:51 +00:00
David Shah 8f9eba3fe3 Add new tile types and MAC16s to chipdb 2017-11-17 15:09:41 +00:00
David Shah c9160c77dc Tidy up some of the icebox changes 2017-11-17 15:09:40 +00:00
David Shah 2f962ac92e Fix 5k corner routing, and reverse engineer SPRAM 2017-11-17 15:09:17 +00:00
David Shah 88eebff7db Start UltraPlus DSP documentation 2017-11-17 15:08:47 +00:00
David Shah 94aa596cb1 Trace DSP routing 2017-11-17 15:08:25 +00:00
David Shah c69b87d593 Fix 5k gbin configuration 2017-11-06 16:14:41 +00:00
David Shah 1c56e56032 Fix 5k padin_glb_netwk bits 2017-11-05 16:32:58 +00:00
David Shah e75e9171ac Fix global network 1 padin bit 2017-11-01 20:16:33 +00:00
David Shah 3a6b05c6aa Work on 5k global buffer pads 2017-11-01 15:37:51 +00:00
David Shah 6f76600881 Add missing up5k global buffer pads 2017-10-31 19:45:27 +00:00
David Shah 2ad5600b47 Working up5k PLL support 2017-10-31 15:11:40 +00:00
David Shah 938bf7b65e Fix loading 5k asc files 2017-10-31 14:21:08 +00:00
David Shah b78417ee78 Add new 5k IO config bits to database 2017-10-29 17:07:18 +00:00
David Shah e9e9d0e9cb Share glb_netwk data between 5k and 8k parts 2017-10-29 16:14:15 +00:00
David Shah d5b610f0e8 Fix global network data for up5k 2017-10-25 16:20:28 +01:00
David Shah 42325a4774 Fix colbuf db for up5k 2017-10-25 14:49:33 +01:00
David Shah 6e80f13b56 Add CarryInSet bit to DB 2017-10-24 19:38:35 +01:00
David Shah bf21b64498 Fix IeRen database for up5k 2017-10-23 11:30:23 +01:00
David Shah 5afdeee0e0 Swap IEREN for pin 26 to get example working, other inputs still need fixing 2017-10-21 20:16:10 +01:00
David Shah ec419b4206 Fix RAM tile location in icebox.py 2017-10-21 18:30:14 +01:00
David Shah 29593ed2cb Fix icebox to generate a working chipdb 2017-10-21 18:22:00 +01:00
David Shah 85be8e4e3d Bring chip data in icebox in line with icepack - and icecube 2017-10-21 11:27:12 +01:00
David Shah ca35e566d4 Modify icebox.py so it generates a 5k chipdb 2017-10-20 19:13:23 +01:00