5ab07ed32a
Merge pull request #178 from elmsfu/hlc/add_symbols_support
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hlc: parse '.sym>' to track signal names from HLC to ASC
2018-10-10 13:46:31 +02:00
497028cf5a
Add 5k support to hlc2asc.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
2018-08-09 13:01:18 -07:00
542e9ef0f3
icebox: parse '.sym>' HLC to track signal names
2018-07-26 10:12:56 -07:00
61aa5c5094
icebox_hlc2asc: fix _lut_ keyword parsing
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'self.lut_bits is None' was always false. The _lut_ keyword is used by asc2hlc, so when converting asc->hlc->asc the lut_bits were always all zeros.
2018-07-19 16:03:20 -07:00
e0eaaf5b91
Spelling fixes in messages
2018-07-19 13:59:42 +02:00
22f10b9e22
hlc: Use glb_network for current device.
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Previously the 1k global networks were hard coded. This now uses the
values from the given part.
2018-07-16 18:05:49 -07:00
763eb0f217
Merge pull request #168 from elmsfu/hlc2asc/verilog_literal_ram_data
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icebox_hlc2asc: Allow data of ram to use verilog literal format
2018-07-10 21:21:13 +02:00
41ac3eaeab
icebox_hlc2asc: Allow data of ram to use verilog literal format
2018-07-03 11:31:43 -07:00
a3ae94cbeb
icebox_hlc2asc: Allow io_X/GLOBAL_OUTPUT_BUFFER
2018-06-22 21:44:48 -07:00
e2adc23681
icebox_hlc2asc: Fix spelling in error message.
2018-06-22 21:44:39 -07:00
ac47e8e13c
icebox_hlc2asc: update to support device by family
2018-06-20 07:31:19 -07:00
2c8539a90d
icebox_hlc2asc: Adding more descriptive errors messages
2018-06-20 07:30:59 -07:00
f1f9da2d5b
icebox_hlc2asc: Set LUT bits to zero by default.
2018-06-15 17:04:25 -07:00
fdc6f1a1b1
icebox: Fix issue introduced by f7e9fec63a
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Current code fails with the following;
```
Parse error in line 94:
span4_y3_g15_6 -> local_g0_3 -> D_OUT_0
```
2018-06-14 17:23:15 -07:00
25cda32bb8
Merge pull request #151 from mithro/hlc-lut-init
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icebox_hlc2asc: Allow truth tables to be specified as init string.
2018-06-13 13:44:04 +02:00
73e2ddb7c7
Merge pull request #158 from mithro/remove-bidir-hlc
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Remove bidir stuff in HLC
2018-06-13 13:43:24 +02:00
82f2f3d278
HLC: Use '~>' instead of '<->' for routing switches.
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As mentioned in ca6b2d9ebd
2018-06-12 19:18:50 -07:00
d8d30fa630
icebox_hlc2asc: Remove the bidirectional support.
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See ca6b2d9ebd
2018-06-12 19:18:45 -07:00
6c21817732
icebox_hlc2asc: Accept device types such as HX1K
2018-06-11 16:04:57 -07:00
ee84ee4d1b
icebox_hlc2asc: Allow truth tables to be specified as init string.
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Examples;
```hlc
lutff_5 {
# - Parameters -------
# LUT_INIT = 0111111110000000
local_g3_4 -> lutff_5/in_0
local_g0_6 -> lutff_5/in_1
local_g2_7 -> lutff_5/in_2
lutff_5/out -> span4_x3_g12_11
lutff_5/out -> local_g3_5 -> lutff_5/in_3
out = 16'b0111111110000000
enable_dff
}
```
```hlc
lutff_4 {
local_g3_5 -> lutff_4/in_2
lutff_4/out -> span12_y12_g6_0
out = 16'b0000000000010000
enable_dff
}
```
```hlc
lutff_2 {
# - Parameters -------
# LUT_INIT = 01
lutff_2/out -> span12_y12_g8_0
lutff_2/out -> span12_x2_g14_0
lutff_2/out -> local_g0_2 -> lutff_2/in_0
out = 2'b01
enable_dff
}
```
2018-06-11 15:54:51 -07:00
eb9947d3da
Improve error message.
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Now;
-----------------
Parse error in line 364:
span4_y9_g7_10 <-> span4_x3_g13_5
conflicting bits ['!B12[8]', '!B12[9]', 'B12[10]']
setting:{(12, 10)} - current clear:{(12, 10), (12, 8)}
clearing:{(12, 9), (12, 8)} - current set :{(12, 9)}
-----------------
Previously;
-----------------
File "icebox_hlc2asc.py", line 742, in apply_directive
self.set_bits(bits)
File "icebox_hlc2asc.py", line 762, in set_bits
raise ParseError("conflicting bits")
TypeError: __init__() takes 1 positional argument but 2 were given
-----------------
2018-06-04 23:57:36 -07:00
5965f4d1ab
Allow routing (bidir) entries to be looked up in either direction.
2018-06-01 07:56:29 -07:00
dd55658266
Better error message when bit pattern is missing.
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Previously;
```
self.apply_directive('buffer', src, dst)
File "/usr/local/google/home/tansell/work/catx/vtr/env/conda/bin/icebox_hlc2asc", line 698, in apply_directive
bits, = [entry[0] for entry in self.db if entry[1:] == fields]
ValueError: not enough values to unpack (expected 1, got 0)
```
Now:
```
Parse error in line 2108:
span12_y4_g14_0 -> span4_y4_g11_7 <-> span4_x7_g4_0
No bit pattern for ['buffer', 'sp12_h_r_11', 'sp4_h_r_7'] in LogicTile(1k, 7, 4)
```
2018-05-30 13:21:48 -07:00
f7e9fec63a
Allow prefixes in multiple chained statements.
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IE
```
lutff_1 {
lutff_1/out -> local_g2_1 -> lutff_1/in_0
local_g2_2 -> lutff_1/in_3
local_g2_7 -> lutff_1/in_2
}
```
2018-05-30 13:05:20 -07:00
353a338505
Support both `abc/123` and `123` forms of specifying tracks.
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Kind of fixes #145 .
2018-05-30 12:42:57 -07:00
c9c181fef2
icebox: Put .hlc converters under ISC license
2017-09-02 14:45:03 +02:00
8354bc6086
Removed files that are under GNU licenses
2017-08-31 15:00:41 +02:00
bb2bc7a00c
icebox: Fix parsing of IO block special wires
2017-08-27 22:25:50 +02:00
5ac8f1a687
icebox: Fix parsing of PLL directive
2017-08-27 22:20:42 +02:00
7e4689d3f5
icebox: Give useful error messages for .hlc parsing errors
2017-08-27 22:14:38 +02:00
1565fdc0ee
Implement high-level configuration format
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# Conflicts:
# icebox/Makefile
2017-08-25 14:59:59 +02:00
Clifford Wolf
Keith Rothman
Elms
Larry Doolittle
Tim 'mithro' Ansell
Elms
Joel Holdsworth
Roland Lutz