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Merge pull request #257 from smunaut/ice40_shiftreg_div_mode 

icebox: Add support for the bit 1 of SHIFTREG_DIV_MODE
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Claire Wolf 2020-06-25 18:35:48 +02:00 committed by GitHub
parent 9e44d9f1d2 ce1d811d21
commit f138ade065
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1 changed files with 2 additions and 1 deletions
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icebox/icebox.py
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@ -1954,7 +1954,8 @@ pllinfo_db = {
"PLLOUT_SELECT_B_1": (12, 31, "PLLCONFIG_3"),
# Numeric Parameters
"SHIFTREG_DIV_MODE": (12, 31, "PLLCONFIG_4"),
"SHIFTREG_DIV_MODE_0": (12, 31, "PLLCONFIG_4"),
"SHIFTREG_DIV_MODE_1": (14, 31, "PLLCONFIG_6"),
"FDA_FEEDBACK_0": (12, 31, "PLLCONFIG_9"),
"FDA_FEEDBACK_1": (13, 31, "PLLCONFIG_1"),
"FDA_FEEDBACK_2": (13, 31, "PLLCONFIG_2"),