luke
/
abc
mirror of https://github.com/YosysHQ/abc.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity
4,329 Commits 27 Branches 57 Tags 58 MiB
Commit Graph

1337 Commits

Author SHA1 Message Date
Alan Mishchenko 1c990fc4f2 Experiments with path enumeration. 2018-06-10 22:31:59 -07:00
Alan Mishchenko b729c737b5 Adding switch 'clp -o' to reverse initial variable ordering. 2018-06-07 15:53:12 -07:00
Alan Mishchenko aae37ffd4c Experiments with path enumeration. 2018-06-06 14:17:52 -07:00
Alan Mishchenko 812a1bb3ab Adding command print_mint. 2018-06-04 23:22:11 -07:00
Alan Mishchenko 3697bdbe43 Simple BDD package. 2018-05-23 22:46:56 +09:00
Alan Mishchenko cd159976a1 Bug fix in &sat -x. 2018-05-07 20:01:15 -07:00
Alan Mishchenko ccf529695d Adding &sat -x to save CEXes for multi-output combinational miters. 2018-05-06 22:13:18 -07:00
Alan Mishchenko fa00219d4c Adding switch &w -p to dump AIG in a Verilog file. 2018-04-25 16:58:29 -07:00
Alan Mishchenko f093aef867 The ECO code. 2018-04-25 13:19:41 -07:00
Alan Mishchenko cce9ff2113 The ECO code. 2018-04-25 13:01:36 -07:00
Alan Mishchenko 5d1abad84d Typo in the command description. 2018-04-25 11:59:34 -07:00
Alan Mishchenko 098103012d Memory abstraction. 2018-04-15 21:23:22 -07:00
Alan Mishchenko 9ff7134f24 Adding new NPN code developed by XueGong Zhou at Fudan University. 2018-03-25 11:28:56 -07:00
Alan Mishchenko 53e7d1f9ef Adding switch 'scorr -f' to dump inductive invariant as an AIG. 2018-03-22 10:10:09 -07:00
Alan Mishchenko f716948c27 Experiments with LUT mapping. 2018-02-10 15:45:54 -08:00
Alan Mishchenko 28602ccf2c Improvements to NDR to represent hierarchical designs. 2018-02-05 00:39:10 -08:00
Alan Mishchenko 3202c2581e Improvements to NDR to represent hierarchical designs. 2018-02-05 00:37:39 -08:00
Alan Mishchenko 5158acb113 Experiments with circuit-based SAT. 2018-01-27 13:05:37 -08:00
Alan Mishchenko e4cd0d60f1 Experiments with SAT-based simulation. 2018-01-25 00:09:27 -08:00
Alan Mishchenko 6274498e01 Updates to exact synthesis commands. 2018-01-19 14:03:24 -08:00
Alan Mishchenko 834e248019 New command 'testexact'. 2018-01-04 22:33:29 -08:00
Alan Mishchenko f3dcf87cea New exact synthesis command 'allexact'. 2017-12-30 16:13:52 -08:00
Alan Mishchenko 7d7ce3ecd0 New exact synthesis command 'allexact'. 2017-12-28 23:04:24 -08:00
Alan Mishchenko c7b65a15d3 Adding parameter structure to 'twoexact' and 'lutexact'. 2017-12-06 15:09:11 -08:00
Alan Mishchenko e37bbba72d An improvement to 'twoexact' and 'lutexact'. 2017-12-06 13:00:08 -08:00
Alan Mishchenko 67181d0446 An improvement to 'twoexact' and 'lutexact'. 2017-12-06 11:18:43 -08:00
Alan Mishchenko c4322a0afd Switch -a to use only AND-gates in 'twoexact' and 'lutexact'. 2017-12-06 10:31:21 -08:00
Alan Mishchenko 3f35ac8180 New command 'lutexact'. 2017-12-05 18:22:27 -08:00
Alan Mishchenko 1743979b75 Adding switch -a to 'write_verilog' to write factored forms without XORs and MUXes. 2017-12-03 14:39:11 -08:00
Alan Mishchenko accf4825e5 Adding API to dump MiniAIG into a Verilog file and other small changes. 2017-10-22 15:44:13 -07:00
Alan Mishchenko 15908929ca Adding random search in exact synthesis. 2017-10-20 07:49:01 +09:00
Alan Mishchenko 8f690fe862 Integrating old SAT solver into majexact and twoexact. 2017-10-19 13:38:09 +09:00
Alan Mishchenko c1b4b79e99 Integrating Glucose into &qbf. 2017-10-17 13:53:48 +09:00
Alan Mishchenko 222d7c7a92 Fix the build. 2017-10-11 18:12:20 +07:00
Alan Mishchenko 711ea3dfec Another variation on exact synthesis. 2017-10-11 18:07:35 +07:00
Alan Mishchenko 05ca7dbf47 Adding printout of slack distribution for mapped networks. 2017-10-02 13:44:48 +03:00
Alan Mishchenko c272188946 Exact synthesis of majority gates. 2017-10-01 19:49:28 +03:00
Alan Mishchenko d3152aefa7 Exact synthesis of majority gates. 2017-10-01 18:00:09 +03:00
Alan Mishchenko c696ae95d0 Maintenance and updates. 2017-09-24 23:38:01 -07:00
Alan Mishchenko 287f9efcce Maintenance and updates. 2017-09-20 19:27:46 -07:00
Alan Mishchenko 36858c5365 Enabling Glucose in SAT sweeping: &fraig -g. 2017-09-18 09:36:08 -07:00
Alan Mishchenko b5d42e8bf3 Adding support for Dimacs input to &satoko. 2017-09-16 13:13:30 -07:00
Alan Mishchenko b63e3ee4b4 Experiment with mapping. 2017-09-15 12:40:43 -07:00
Alan Mishchenko 4c0b78cf7f Updates to &bmcs to help debugging. 2017-09-12 11:43:14 -07:00
Alan Mishchenko efbf5208a2 Adding switch '-c' to 'dsec' to disable internal netlist check. 2017-09-09 08:24:57 -07:00
Alan Mishchenko af4c76e21a Disabling CNF simplification in &bmcs -g. 2017-09-07 19:37:46 -07:00
Alan Mishchenko ba0d855fd4 Trying to enable CNF simplification in &bmcs -g. 2017-09-07 19:16:13 -07:00
Alan Mishchenko 97dd6019bf Integrating Glucose into bmc3 -g. 2017-09-06 19:56:53 -07:00
Alan Mishchenko f68bd519c6 Integrating Glucose into &bmcs -g. 2017-09-06 17:57:44 -07:00
Alan Mishchenko 7857b7fd8b Renaming command-line option '-s' to be '-q' in 'pdr'. 2017-09-06 08:39:23 -07:00