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509 Commits 27 Branches 57 Tags 58 MiB
Commit Graph

286 Commits

Author SHA1 Message Date
Alan Mishchenko 88251e97e3 Minor bug fix in 'testcex' (made it consider outputs in direct order). 2011-08-01 11:24:02 +07:00
Alan Mishchenko 778215e7ee Added new APIs to the AIG manager. 2011-07-31 20:36:43 +07:00
Alan Mishchenko 0d65c49048 Improvements to 'bmc3' (start frame; stop when all POs are SAT; stop when 2^nRegs frames are completed). 2011-07-31 20:22:57 +07:00
Alan Mishchenko 43d8b8bece Changes to enable smarter simulation. 2011-07-30 20:19:28 +07:00
Alan Mishchenko b8de7a28e0 Changes to enable smarter simulation. 2011-07-30 19:56:52 +07:00
Alan Mishchenko 02711b6392 Added generation of counter-examples to induction in 'ind'. 2011-07-30 19:18:26 +07:00
Alan Mishchenko c60852f4a9 Changes to enable smarter simulation. 2011-07-30 13:37:02 +07:00
Alan Mishchenko 2ea0ded0bc Changes to enable smarter simulation. 2011-07-30 13:30:04 +07:00
Alan Mishchenko e4f15dd003 Changes to enable smarter simulation. 2011-07-30 02:04:54 +07:00
Alan Mishchenko badf8e4742 Improving and updating the abstraction code. 2011-07-29 18:57:54 +07:00
Alan Mishchenko dac71e9b33 Added deriving abstraction in GIA from the precomputed flop map. 2011-07-29 16:21:25 +07:00
Alan Mishchenko ce38474c74 Improving and updating the abstraction code. 2011-07-29 15:38:44 +07:00
Alan Mishchenko 581daaeade Changes to enable smarter simulation. 2011-07-29 14:20:41 +07:00
Alan Mishchenko 8ed6d8e05f Adding procedures to find the care bits of a counter-example (update). 2011-07-27 20:18:14 +07:00
Alan Mishchenko ff963167fe Added random generation of 64-bit numbers. 2011-07-27 18:30:08 +07:00
Alan Mishchenko 7184003b42 Adding procedures to find the care bits of a counter-example (update). 2011-07-25 20:52:15 +07:00
Alan Mishchenko e7a5a74b4c Adding procedures to find the care bits of a counter-example. 2011-07-25 20:35:06 +07:00
Alan Mishchenko c4dd8067fd Bug fix in how seq cleanup handles cand equiv classes. 2011-07-25 19:29:57 +07:00
Alan Mishchenko 9e307901c7 Added support for constraints in AIGER (bug fix). 2011-07-22 20:29:26 +07:00
Alan Mishchenko 76447062cc Adding &equiv3, a new way of refining equivalence classes. 2011-07-22 20:20:19 +07:00
Alan Mishchenko 5b71a8f849 Added support for constraints in AIGER (bug fix). 2011-07-21 22:42:11 +07:00
Alan Mishchenko 5b616990b4 Added support for constraints in AIGER (bug fix). 2011-07-21 22:38:20 +07:00
Alan Mishchenko 9a2a0f2912 Changes to enable smarter simulation. 2011-07-21 17:55:44 +07:00
Alan Mishchenko 515835579e Added support for constraints in AIGER (bug fix). 2011-07-21 13:04:32 +07:00
Alan Mishchenko f899bae8f6 Added support for constraints in AIGER (bug fix). 2011-07-20 22:16:06 +07:00
Alan Mishchenko 267f61164a Changes to enable smarter simulation. 2011-07-20 18:40:09 +07:00
Alan Mishchenko bb86d9142e New demitering features. 2011-07-20 13:52:54 +07:00
Alan Mishchenko 3ab9683d26 Added support for constraints in AIGER (bug fix). 2011-07-20 13:45:30 +07:00
Alan Mishchenko c511bccb67 Added support for constraints in AIGER. 2011-07-20 10:11:49 +07:00
Alan Mishchenko 5e7de1f80a Added report about exceeding the conflict limit in 'ind'. 2011-07-19 11:16:53 +07:00
Alan Mishchenko 7ad51056bd Diagnostic printout for random simulation 2011-07-16 15:00:39 +07:00
Alan Mishchenko ccaed178ca Fixed a glitch in &dch, which removed the flops. 2011-07-16 12:36:06 +07:00
Alan Mishchenko 97b488e72e Fixed memory leak in the AIGER reader. 2011-07-13 10:50:36 +07:00
Alan Mishchenko 73702835c6 Added equivalence class computation for flop outputs only in &equiv2. 2011-07-13 10:13:24 +07:00
Alan Mishchenko f866920eb5 Added a new demitering feature for dual-output miters. 2011-07-02 13:58:12 -07:00
Alan Mishchenko cab60501d0 Fixed the problem in mapping with the new check. 2011-06-26 19:40:16 -07:00
Alan Mishchenko 68c79ee879 Added command &filter to filter equiv classes. 2011-06-15 00:31:11 -07:00
Alan Mishchenko b2dfa01370 Adding command 'srm2' (additional feature). 2011-06-08 11:34:51 -07:00
Alan Mishchenko bfbbfadfc4 Adding command 'srm2'. 2011-06-08 09:23:31 -07:00
Alan Mishchenko 31360734b7 Added new command 'outdec'. 2011-05-19 11:43:11 +07:00
Alan Mishchenko ef6778b8fe Added conversion of cex after phase abstraction. 2011-05-18 13:35:17 +07:00
Alan Mishchenko 265db2a9d1 Fixing mismatch in reconcile. 2011-05-13 10:19:29 +08:00
Alan Mishchenko 3c7842be32 Improvements to timeout. 2011-05-11 22:14:12 +08:00
Alan Mishchenko b8b75cf14f Improvements in sequential verification. 2011-05-07 18:21:50 -07:00
Alan Mishchenko 4b21edde65 Improvements in sequential verification. 2011-05-07 12:19:11 -07:00
Alan Mishchenko e2e3f6a228 Improvements in sequential verification. 2011-05-06 20:33:06 -07:00
Alan Mishchenko 3fed776860 Added switch to bmc3, which allows to replace some PIs with constants. 2011-05-01 16:46:40 -07:00
Alan Mishchenko 2140c5d980 Updating testcext to ignore the diff in register count and other things. 2011-05-01 15:36:39 -07:00
Alan Mishchenko e4d0f4715a Added new options to testcex. 2011-04-28 09:56:14 -04:00
Alan Mishchenko 631b50aa59 Commented out debug messages. 2011-04-26 22:56:04 -04:00