mirror of https://github.com/YosysHQ/abc.git
Changes to enable smarter simulation.
This commit is contained in:
parent
badf8e4742
commit
e4f15dd003
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@ -230,6 +230,7 @@ extern int Ssw_ClassesRefineGroup( Ssw_Cla_t * p, Vec_Ptr_t * vReprs,
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extern int Ssw_ClassesRefineOneClass( Ssw_Cla_t * p, Aig_Obj_t * pRepr, int fRecursive );
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extern int Ssw_ClassesRefineConst1Group( Ssw_Cla_t * p, Vec_Ptr_t * vRoots, int fRecursive );
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extern int Ssw_ClassesRefineConst1( Ssw_Cla_t * p, int fRecursive );
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extern int Ssw_ClassesPrepareRehash( Ssw_Cla_t * p, Vec_Ptr_t * vCands, int fConstCorr );
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/*=== sswCnf.c ===================================================*/
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extern Ssw_Sat_t * Ssw_SatStart( int fPolarFlip );
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extern void Ssw_SatStop( Ssw_Sat_t * p );
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@ -210,11 +210,9 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
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Value = Ssw_RarGetBinPat( p, i, p->pGroupValues[i] );
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assert( Value > 0 );
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p->pPatCosts[k] += 1.0/(Value*Value);
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// printf( "%d ", Value );
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}
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// printf( "\n" );
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// print the result
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printf( "%3d : %9.6f\n", k, p->pPatCosts[k] );
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// printf( "%3d : %9.6f\n", k, p->pPatCosts[k] );
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}
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// choose as many as there are words
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@ -239,7 +237,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
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pData = (unsigned *)Vec_PtrEntry( p->vSimInfo, Aig_ObjId(pObj) ) + p->nWords * (p->nFrames - 1);
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Vec_IntPush( vInits, Aig_InfoHasBit(pData, iPatBest) );
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}
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printf( "Best pattern %5d\n", iPatBest );
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//printf( "Best pattern %5d\n", iPatBest );
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}
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assert( Vec_IntSize(vInits) == Aig_ManRegNum(p->pAig) * p->nWords );
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}
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@ -53,6 +53,8 @@ struct Ssw_RarMan_t_
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double * pPatCosts; // pattern costs
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// best patterns
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Vec_Int_t * vPatBests; // best patterns
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int iFailPo; // failed primary output
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int iFailPat; // failed pattern
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};
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@ -85,6 +87,81 @@ static inline word * Ssw_RarPatSim( Ssw_RarMan_t * p, int Id ) { assert( Id < 6
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/// FUNCTION DEFINITIONS ///
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////////////////////////////////////////////////////////////////////////
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/**Function*************************************************************
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Synopsis [Initializes random primary inputs.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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void Ssw_RarManAssingRandomPis( Ssw_RarMan_t * p )
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{
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word * pSim;
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Aig_Obj_t * pObj;
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int w, i;
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Saig_ManForEachPi( p->pAig, pObj, i )
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{
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pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
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for ( w = 0; w < p->nWords; w++ )
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pSim[w] = Aig_ManRandom64(0);
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pSim[0] <<= 1;
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}
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}
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/**Function*************************************************************
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Synopsis [Derives the counter-example.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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Abc_Cex_t * Ssw_RarDeriveCex( Ssw_RarMan_t * p, int iFrame, int iPo, int iPatFinal )
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{
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Abc_Cex_t * pCex;
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Aig_Obj_t * pObj;
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Vec_Int_t * vTrace;
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word * pSim;
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int i, r, f, iBit, iPatThis;
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// compute the pattern sequence
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iPatThis = iPatFinal;
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vTrace = Vec_IntStartFull( iFrame / p->nFrames + 1 );
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Vec_IntWriteEntry( vTrace, iFrame / p->nFrames, iPatFinal );
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for ( r = iFrame / p->nFrames - 1; r >= 0; r-- )
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{
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iPatThis = Vec_IntEntry( p->vPatBests, r * p->nWords + iPatThis / 64 );
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Vec_IntWriteEntry( vTrace, r, iPatThis );
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}
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// create counter-example
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pCex = Abc_CexAlloc( Aig_ManRegNum(p->pAig), Saig_ManPiNum(p->pAig), iFrame+1 );
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pCex->iFrame = iFrame;
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pCex->iPo = iPo;
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// insert the bits
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iBit = Aig_ManRegNum(p->pAig);
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for ( f = 0; f < iFrame; f++ )
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{
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Ssw_RarManAssingRandomPis( p );
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iPatThis = Vec_IntEntry( vTrace, f / p->nFrames );
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Saig_ManForEachPi( p->pAig, pObj, i )
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{
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pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
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if ( Aig_InfoHasBit( (unsigned *)pSim, iPatThis ) )
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Aig_InfoSetBit( pCex->pData, iBit );
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iBit++;
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}
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}
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Vec_IntFree( vTrace );
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return pCex;
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}
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/**Function*************************************************************
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Synopsis [Transposing 32-bit matrix.]
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@ -282,12 +359,7 @@ void Ssw_RarManInitialize( Ssw_RarMan_t * p, Vec_Int_t * vInit )
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for ( w = 0; w < p->nWords; w++ )
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pSim[w] = ~(word)0;
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// primary inputs
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Saig_ManForEachPi( p->pAig, pObj, i )
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{
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pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
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for ( w = 0; w < p->nWords; w++ )
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pSim[w] = Aig_ManRandom64(0);
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}
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Ssw_RarManAssingRandomPis( p );
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// flop outputs
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if ( vInit )
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{
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@ -296,7 +368,7 @@ void Ssw_RarManInitialize( Ssw_RarMan_t * p, Vec_Int_t * vInit )
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{
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pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
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for ( w = 0; w < p->nWords; w++ )
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pSim[w] = Vec_IntEntry( vInit, w * Saig_ManRegNum(p->pAig) + i );
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pSim[w] = Vec_IntEntry(vInit, w * Saig_ManRegNum(p->pAig) + i) ? ~(word)0 : (word)0;
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}
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}
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else
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@ -311,6 +383,34 @@ void Ssw_RarManInitialize( Ssw_RarMan_t * p, Vec_Int_t * vInit )
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}
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}
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/**Function*************************************************************
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Synopsis [Returns 1 if simulation info is composed of all zeros.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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int Ssw_RarManObjWhichOne( Ssw_RarMan_t * p, Aig_Obj_t * pObj )
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{
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word * pSim = Ssw_RarObjSim( p, Aig_ObjId(pObj) );
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word Flip = pObj->fPhase ? ~0 : 0;
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int w, i;
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for ( w = 0; w < p->nWords; w++ )
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if ( pSim[w] ^ Flip )
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{
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for ( i = 0; i < 64; i++ )
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if ( ((pSim[w] ^ Flip) >> i) & 1 )
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break;
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assert( i < 64 );
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return w * 64 + i;
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}
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return -1;
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}
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/**Function*************************************************************
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Synopsis [Returns 1 if simulation info is composed of all zeros.]
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@ -356,6 +456,44 @@ int Ssw_RarManObjsAreEqual( Ssw_RarMan_t * p, Aig_Obj_t * pObj0, Aig_Obj_t * pOb
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return 1;
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}
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/**Function*************************************************************
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Synopsis [Computes hash value of the node using its simulation info.]
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Description []
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SideEffects []
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SeeAlso []
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***********************************************************************/
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unsigned Ssw_RarManObjHashWord( Ssw_RarMan_t * p, Aig_Obj_t * pObj )
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{
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static int s_SPrimes[128] = {
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1009, 1049, 1093, 1151, 1201, 1249, 1297, 1361, 1427, 1459,
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1499, 1559, 1607, 1657, 1709, 1759, 1823, 1877, 1933, 1997,
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2039, 2089, 2141, 2213, 2269, 2311, 2371, 2411, 2467, 2543,
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2609, 2663, 2699, 2741, 2797, 2851, 2909, 2969, 3037, 3089,
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3169, 3221, 3299, 3331, 3389, 3461, 3517, 3557, 3613, 3671,
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3719, 3779, 3847, 3907, 3943, 4013, 4073, 4129, 4201, 4243,
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4289, 4363, 4441, 4493, 4549, 4621, 4663, 4729, 4793, 4871,
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4933, 4973, 5021, 5087, 5153, 5227, 5281, 5351, 5417, 5471,
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5519, 5573, 5651, 5693, 5749, 5821, 5861, 5923, 6011, 6073,
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6131, 6199, 6257, 6301, 6353, 6397, 6481, 6563, 6619, 6689,
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6737, 6803, 6863, 6917, 6977, 7027, 7109, 7187, 7237, 7309,
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7393, 7477, 7523, 7561, 7607, 7681, 7727, 7817, 7877, 7933,
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8011, 8039, 8059, 8081, 8093, 8111, 8123, 8147
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};
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unsigned * pSims;
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unsigned uHash;
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int i;
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uHash = 0;
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pSims = (unsigned *)Ssw_RarObjSim( p, pObj->Id );
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for ( i = 0; i < 2 * p->nWords; i++ )
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uHash ^= pSims[i] * s_SPrimes[i & 0x7F];
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return uHash;
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}
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/**Function*************************************************************
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Synopsis [Check if any of the POs becomes non-constant.]
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@ -371,12 +509,18 @@ int Ssw_RarManCheckNonConstOutputs( Ssw_RarMan_t * p )
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{
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Aig_Obj_t * pObj;
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int i;
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p->iFailPo = -1;
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p->iFailPat = -1;
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Saig_ManForEachPo( p->pAig, pObj, i )
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{
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if ( p->pAig->nConstrs && i >= Saig_ManPoNum(p->pAig) - p->pAig->nConstrs )
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return 0;
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if ( !Ssw_RarManObjIsConst(p, pObj) )
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{
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p->iFailPo = i;
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p->iFailPat = Ssw_RarManObjWhichOne( p, pObj );
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return 1;
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}
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}
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return 0;
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}
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@ -392,7 +536,7 @@ int Ssw_RarManCheckNonConstOutputs( Ssw_RarMan_t * p )
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SeeAlso []
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***********************************************************************/
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void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate )
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void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate, int fFirst )
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{
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Aig_Obj_t * pObj, * pRepr;
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word * pSim, * pSim0, * pSim1;
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@ -460,8 +604,21 @@ void Ssw_RarManSimulate( Ssw_RarMan_t * p, Vec_Int_t * vInit, int fUpdate )
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// refine classes
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if ( fUpdate )
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{
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Ssw_ClassesRefineConst1Group( p->ppClasses, p->vUpdConst, 1 );
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Ssw_ClassesRefineGroup( p->ppClasses, p->vUpdClass, 1 );
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if ( fFirst )
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{
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Vec_Ptr_t * vCands = Vec_PtrAlloc( 1000 );
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Aig_ManForEachObj( p->pAig, pObj, i )
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if ( Ssw_ObjIsConst1Cand( p->pAig, pObj ) )
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Vec_PtrPush( vCands, pObj );
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assert( Vec_PtrSize(vCands) == Ssw_ClassesCand1Num(p->ppClasses) );
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Ssw_ClassesPrepareRehash( p->ppClasses, vCands, 0 );
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Vec_PtrFree( vCands );
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}
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else
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{
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Ssw_ClassesRefineConst1Group( p->ppClasses, p->vUpdConst, 1 );
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Ssw_ClassesRefineGroup( p->ppClasses, p->vUpdClass, 1 );
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}
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}
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}
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@ -565,11 +722,9 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
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Value = Ssw_RarGetBinPat( p, i, pData[i] );
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assert( Value > 0 );
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p->pPatCosts[k] += 1.0/(Value*Value);
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// printf( "%d ", Value );
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}
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// printf( "\n" );
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// print the result
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printf( "%3d : %9.6f\n", k, p->pPatCosts[k] );
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//printf( "%3d : %9.6f\n", k, p->pPatCosts[k] );
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}
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// choose as many as there are words
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@ -592,7 +747,7 @@ static void Ssw_RarTransferPatterns( Ssw_RarMan_t * p, Vec_Int_t * vInits )
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pPattern = (unsigned *)Ssw_RarPatSim( p, iPatBest );
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for ( k = 0; k < Aig_ManRegNum(p->pAig); k++ )
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Vec_IntPush( vInits, Aig_InfoHasBit(pPattern, k) );
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printf( "Best pattern %5d\n", iPatBest );
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//printf( "Best pattern %5d\n", iPatBest );
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Vec_IntPush( p->vPatBests, iPatBest );
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}
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assert( Vec_IntSize(vInits) == Aig_ManRegNum(p->pAig) * p->nWords );
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@ -688,11 +843,13 @@ int Ssw_RarSimulate2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSize, i
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// simulate
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for ( f = 0; f < nFrames; f++ )
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{
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Ssw_RarManSimulate( p, f ? NULL : p->vInits, 0 );
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Ssw_RarManSimulate( p, f ? NULL : p->vInits, 0, 0 );
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if ( fMiter && Ssw_RarManCheckNonConstOutputs(p) )
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{
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if ( fVerbose ) printf( "\n" );
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printf( "Simulation asserted a PO in frame f: %d <= f < %d.\n", r * nFrames, (r+1) * nFrames );
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ABC_FREE( pAig->pSeqModel );
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pAig->pSeqModel = Ssw_RarDeriveCex( p, r * p->nFrames + f, p->iFailPo, p->iFailPat );
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RetValue = 0;
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goto finish;
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}
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@ -774,7 +931,7 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
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p->ppClasses = Ssw_ClassesPrepareSimple( pAig, fLatchOnly, 0 );
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else
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p->ppClasses = Ssw_ClassesPrepareFromReprs( pAig );
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Ssw_ClassesSetData( p->ppClasses, p, NULL, Ssw_RarManObjIsConst, Ssw_RarManObjsAreEqual );
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Ssw_ClassesSetData( p->ppClasses, p, Ssw_RarManObjHashWord, Ssw_RarManObjIsConst, Ssw_RarManObjsAreEqual );
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// print the stats
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if ( fVerbose )
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{
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@ -793,11 +950,13 @@ int Ssw_RarSignalFilter2( Aig_Man_t * pAig, int nFrames, int nWords, int nBinSiz
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// simulate
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for ( f = 0; f < nFrames; f++ )
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{
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Ssw_RarManSimulate( p, f ? NULL : p->vInits, 1 );
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Ssw_RarManSimulate( p, f ? NULL : p->vInits, 1, !r && !f );
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if ( fMiter && Ssw_RarManCheckNonConstOutputs(p) )
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{
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if ( fVerbose ) printf( "\n" );
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printf( "Simulation asserted a PO in frame f: %d <= f < %d.\n", r * nFrames, (r+1) * nFrames );
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ABC_FREE( pAig->pSeqModel );
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pAig->pSeqModel = Ssw_RarDeriveCex( p, r * p->nFrames + f, p->iFailPo, p->iFailPat );
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RetValue = 0;
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goto finish;
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}
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@ -859,9 +1018,6 @@ int Ssw_RarSignalFilterGia2( Gia_Man_t * p, int nFrames, int nWords, int nBinSiz
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}
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////////////////////////////////////////////////////////////////////////
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/// END OF FILE ///
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////////////////////////////////////////////////////////////////////////
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@ -25167,8 +25167,8 @@ int Abc_CommandAbc9Equiv3( Abc_Frame_t * pAbc, int argc, char ** argv )
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int TimeOut = 0;
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int fUseCex = 0;
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int fLatchOnly = 0;
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int fNewAlgo = 0;
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int fVerbose = 1;
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int fNewAlgo = 1;
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int fVerbose = 0;
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Extra_UtilGetoptReset();
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while ( ( c = Extra_UtilGetopt( argc, argv, "FWBRTxlavh" ) ) != EOF )
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{
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@ -25266,7 +25266,6 @@ int Abc_CommandAbc9Equiv3( Abc_Frame_t * pAbc, int argc, char ** argv )
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return 1;
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}
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}
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// pAbc->Status = Abc_NtkDarSeqEquiv2( pNtk, nFrames, nWords, nBinSize, nRounds, TimeOut, fUseCex? pAbc->pCex: NULL, fLatchOnly, fVerbose );
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if ( fNewAlgo )
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pAbc->Status = Ssw_RarSignalFilterGia2( pAbc->pGia, nFrames, nWords, nBinSize, nRounds, TimeOut, fUseCex? pAbc->pCex: NULL, fLatchOnly, fVerbose );
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else
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@ -25276,14 +25275,14 @@ int Abc_CommandAbc9Equiv3( Abc_Frame_t * pAbc, int argc, char ** argv )
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return 0;
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usage:
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Abc_Print( -2, "usage: &equiv3 [-FWBRT num] [-xlvh]\n" );
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Abc_Print( -2, "usage: &equiv3 [-FWRT num] [-xlvh]\n" );
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Abc_Print( -2, "\t computes candidate equivalence classes\n" );
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Abc_Print( -2, "\t-F num : the max number of frames for BMC [default = %d]\n", nFrames );
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Abc_Print( -2, "\t-W num : the number of words to simulate [default = %d]\n", nWords );
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Abc_Print( -2, "\t-B num : the number of flops in one bin [default = %d]\n", nBinSize );
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// Abc_Print( -2, "\t-B num : the number of flops in one bin [default = %d]\n", nBinSize );
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Abc_Print( -2, "\t-R num : the max number of simulation rounds [default = %d]\n", nRounds );
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Abc_Print( -2, "\t-T num : runtime limit in seconds for all rounds [default = %d]\n", TimeOut );
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Abc_Print( -2, "\t-x : toggle using the current cex to perform refinement [default = %s]\n", fUseCex? "yes": "no" );
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Abc_Print( -2, "\t-x : toggle using the current CEX to perform refinement [default = %s]\n", fUseCex? "yes": "no" );
|
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Abc_Print( -2, "\t-l : toggle considering only latch output equivalences [default = %s]\n", fLatchOnly? "yes": "no" );
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Abc_Print( -2, "\t-a : toggle using a new algorithm [default = %s]\n", fNewAlgo? "yes": "no" );
|
||||
Abc_Print( -2, "\t-v : toggle printing verbose information [default = %s]\n", fVerbose? "yes": "no" );
|
||||
|
|
|
|||
Loading…
Reference in New Issue