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2,844 Commits 27 Branches 57 Tags 58 MiB
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2844 Commits

Author SHA1 Message Date
Alan Mishchenko a1b4773c77 Printing node type statistics. 2014-09-24 17:29:34 -04:00
Alan Mishchenko 7d21182067 Printing node type statistics. 2014-09-24 13:01:24 -04:00
Alan Mishchenko 4db5e3c02d Printing node type statistics. 2014-09-24 12:46:35 -04:00
Alan Mishchenko ffaad9ba10 Bug fix in handling MUXes in Verilog parser, induced by recent changes. 2014-09-24 09:05:40 -04:00
Alan Mishchenko ad079f7207 Added switch -t to &flow2. 2014-09-24 00:33:16 -04:00
Alan Mishchenko ea9c1c0bff Added support of word-level MUXes represented as 'always'-statements. 2014-09-24 00:24:54 -04:00
Alan Mishchenko a4d5a9b5bc Added support of word-level MUXes represented as 'always'-statements. 2014-09-24 00:22:18 -04:00
Alan Mishchenko d9b5aa49f7 Enables dumping stats into a file. 2014-09-23 20:32:37 -04:00
Alan Mishchenko 3f95853f3e Extending &cec to take a single-output miter (usage of switch -d has changed!). 2014-09-23 16:22:21 -04:00
Alan Mishchenko 93e5631cff Debugging the bit-blaster. 2014-09-23 16:04:35 -04:00
Alan Mishchenko 3f6c08dfc6 Debugging the bit-blaster. 2014-09-23 12:54:57 -04:00
Alan Mishchenko 15f5428989 Adding switch to enable SOP balancing in '&flow2'. 2014-09-21 21:40:34 -04:00
Alan Mishchenko 8f3dd475ee Tuning the flow scripts. 2014-09-20 23:37:07 -07:00
Alan Mishchenko dc9d327a58 Extending resource limit. 2014-09-20 23:11:32 -07:00
Alan Mishchenko dc9a08bddc Tuning the flow scripts. 2014-09-20 21:52:39 -07:00
Alan Mishchenko 5ce7aa572f Synchronizing packages. 2014-09-20 17:01:47 -07:00
Alan Mishchenko 76666174b4 Synchronizing packages. 2014-09-20 16:41:11 -07:00
Alan Mishchenko 2d4342f8c4 Synchronizing packages. 2014-09-20 14:50:52 -07:00
Alan Mishchenko 00b8cda3d3 Synchronizing packages. 2014-09-20 14:10:05 -07:00
Alan Mishchenko 1fb65889a3 Updating command 'dsd_clean'. 2014-09-20 13:56:26 -07:00
Alan Mishchenko 29494c3a00 Tuning the flow scripts. 2014-09-20 13:15:57 -07:00
Alan Mishchenko a02b020356 Updating DSD balance to handle XOR gate as having the same delay as AND gate. 2014-09-19 19:06:01 -07:00
Alan Mishchenko f989aea224 Improvements to Boolean matching. 2014-09-19 15:08:46 -07:00
Alan Mishchenko b05ee94311 Improvements to Boolean matching. 2014-09-19 14:06:51 -07:00
Alan Mishchenko ee72791293 Improvements to Boolean matching. 2014-09-18 22:26:54 -07:00
Alan Mishchenko 69699da912 Improvements to Boolean matching. 2014-09-18 16:44:04 -07:00
Alan Mishchenko 596f387b03 Improvements to Boolean matching. 2014-09-18 15:13:12 -07:00
Alan Mishchenko a0ed347992 Improving DSD manager. 2014-09-18 14:50:08 -07:00
Alan Mishchenko 043cfcd775 Concurrency for Boolean matching. 2014-09-18 11:46:14 -07:00
Alan Mishchenko 023e92c470 Improvements to Boolean matching. 2014-09-17 18:58:20 -07:00
Alan Mishchenko 69827a5a88 Improvements to word-level Verilog parser. 2014-09-17 15:20:04 -07:00
Alan Mishchenko ffd77ffedd Improvements to word-level Verilog parser. 2014-09-17 15:14:17 -07:00
Alan Mishchenko 43ee0cff25 Spurious assertion. 2014-09-17 09:54:08 -07:00
Alan Mishchenko ec0b9b6b6e Improvements to word-level Verilog parser. 2014-09-16 22:08:22 -07:00
Alan Mishchenko 6d0b555dab Support for leakage power in Liberty parser and sizer. 2014-09-16 16:44:51 -07:00
Alan Mishchenko 288d64d033 New choice computation. 2014-09-16 14:59:28 -07:00
Alan Mishchenko e033a62282 Code restructuring. 2014-09-16 12:13:25 -07:00
Alan Mishchenko 1d5cb52e4a Improvements to Boolean matching. 2014-09-16 11:56:40 -07:00
Alan Mishchenko 61e58b2d56 Compiler error (duplicate typedef). 2014-09-15 08:54:07 -07:00
Alan Mishchenko 501c3f0b1e Compiler warnings. 2014-09-12 13:53:04 -07:00
Alan Mishchenko 39c68e72e4 Replacing tabs with spaces. 2014-09-12 13:46:11 -07:00
Alan Mishchenko dcb7d0d3fc New word-level representation package. 2014-09-12 13:40:48 -07:00
Alan Mishchenko ae7e286213 Resetting the random seed in 'sparsify'. 2014-09-11 18:50:15 -07:00
Alan Mishchenko 7171812ff1 Updating timing info during normalization. 2014-09-10 15:28:46 -07:00
Alan Mishchenko c7daa8cafd Updating timing info during normalization. 2014-09-10 15:28:03 -07:00
Alan Mishchenko 49f2ec22b9 Bug fix in transferring timing info. 2014-09-09 22:50:15 -07:00
Alan Mishchenko a5e93ff075 Corner-case bug fix in balancing. 2014-09-08 09:33:11 -07:00
Alan Mishchenko 233e12610a Added command 'move_names'. 2014-08-28 13:06:02 -07:00
Alan Mishchenko 79c1928cf9 Added command 'move_names'. 2014-08-28 13:04:47 -07:00
Alan Mishchenko 3c51dd47b5 Tuning LUT mapping flow. 2014-08-28 00:11:24 -07:00