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1,066 Commits 27 Branches 57 Tags 58 MiB
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461 Commits

Author SHA1 Message Date
Alan Mishchenko 5fb7c676c2 Procedure to compute truth tables for POs of GIA. 2012-07-07 13:13:32 -07:00
Alan Mishchenko 5008b1a4f3 Commands &fla_gla/&gla_fla to convert between flop-level and gate-level abstraction. 2012-07-06 20:41:11 -07:00
Alan Mishchenko e879f0f6d1 Tentatively retiring command &abs_start, &abs_cba, &abs_pba, &gla_cba, &gla_pba. 2012-07-06 18:50:50 -07:00
Alan Mishchenko 23467b83b6 Setting infinite default conflict limits in 'bmc', 'int', 'pdr'. 2012-07-06 18:48:35 -07:00
Alan Mishchenko 8b0302cdab Changing default conflict limits in bmc2 and bmc3 to be 0 (no limit). 2012-07-05 13:32:52 -07:00
Alan Mishchenko 3c43fbba1a Other improvements to &vta and &gla. 2012-07-05 13:09:41 -07:00
Alan Mishchenko ce6e6551c3 Other improvements to &vta and &gla. 2012-07-04 18:23:33 -07:00
Alan Mishchenko d3c018cd23 Reducing memory usage in bmc2 and bmc3. 2012-07-01 02:19:19 -07:00
Alan Mishchenko a4908534f1 Bug fix in &vta. 2012-06-29 15:17:03 -07:00
Alan Mishchenko 051cc64ee2 Gate level abstraction (command &gla). 2012-06-28 23:06:07 -07:00
Alan Mishchenko 520c436d28 Gate level abstraction (command &gla). 2012-06-28 16:44:03 -07:00
Alan Mishchenko 7629fd6aea Added min-cut-based refinement of gate-level abstraction (command &gla_refine). 2012-06-24 18:45:42 -07:00
Alan Mishchenko 3c0a9e0862 Switch -A <file_name> to specify file name for dumping abstrated model with &vta -d. 2012-06-21 20:20:26 -07:00
Alan Mishchenko c6af9094c0 Changing 'if' to allow for delay optimization on sequential paths only. 2012-05-20 17:27:53 +07:00
Alan Mishchenko 76539c1956 Added generation of multipliers in 'gen'. 2012-05-15 09:34:24 +07:00
Alan Mishchenko aa087d2513 Making sure cec -n and dsec -n do not remove the I/O names in the current network. 2012-05-08 13:37:19 +08:00
Alan Mishchenko 2c6faa0607 Compilation problem caused by multiple declarations. 2012-04-28 16:04:17 +07:00
Alan Mishchenko 78855cc952 Added supporting dual-output seq miters in &trim. 2012-04-28 04:19:26 +07:00
Alan Mishchenko 2bf7454b41 Added supporting dual-output seq miters in &iso. 2012-04-28 02:21:06 +07:00
Alan Mishchenko 590202e327 Set the failed output index if ORing of outputs was done in 'int'. 2012-04-27 16:14:40 +07:00
Alan Mishchenko 92ad58ffa2 Adding iterative refinement to 'addbuffs'. 2012-04-13 18:20:44 -07:00
Alan Mishchenko 7e21f01269 Updated used message for 'back_reach'. 2012-04-13 15:41:31 -07:00
Alan Mishchenko 0184dab4de Adding iterative refinement to 'addbuffs'. 2012-04-11 16:00:09 -07:00
Alan Mishchenko 0d802453e4 Adding reverse order to 'addbuffs'. 2012-04-11 08:09:31 -07:00
Alan Mishchenko 0509440a45 Improving printouts of critical path. 2012-04-09 15:06:33 -07:00
Alan Mishchenko 48b47300e3 Added dumping abstracted model in &vta. 2012-04-07 12:43:17 -07:00
Alan Mishchenko a21f2986aa Enabling mapping into multi-input AND/OR gates. 2012-03-27 20:15:02 -07:00
Alan Mishchenko 8ed3e40a52 Logic sharing for multi-input gates. 2012-03-25 22:47:08 -07:00
Alan Mishchenko b4df114e4a Logic sharing for multi-input gates. 2012-03-25 16:49:29 -07:00
Alan Mishchenko 309bcf2dec Logic sharing for multi-input gates. 2012-03-25 01:24:26 -07:00
Alan Mishchenko abb889fe6e Improving printouts of gates and support. 2012-03-24 13:15:37 -07:00
Alan Mishchenko 3abd9773a4 Enabled demitering dual-output miters. 2012-03-23 22:52:30 -07:00
Alan Mishchenko 1c31dbe786 Added command 'addbuffs' to create balanced CI/CO paths. 2012-03-23 22:29:25 -07:00
Alan Mishchenko 0792ab0eb6 Additional features for delay optimization 2012-03-21 23:19:49 -07:00
Alan Mishchenko f50ce3dbd9 Switching to a variable-page-size memory manager for clauses and proofs. 2012-03-21 17:13:39 -07:00
Alan Mishchenko c347f2b90b Alternative way of computing delay in SOP balancing. 2012-03-16 15:43:08 -07:00
Alan Mishchenko 795b5a6ce7 Added command 'nodedup' to duplicate nodes with high fanout. 2012-03-11 23:06:14 -07:00
Alan Mishchenko f7c7cb5c65 Adding switch '-n' to 'permute' to derive random topological ordering of internal nodes. 2012-03-06 11:53:07 +01:00
Alan Mishchenko 7926d75ecb Adding features related to the communication bridge. 2012-03-02 00:57:48 -08:00
Alan Mishchenko 3e5e7a2544 Added skipping &iso when there is only one PO. 2012-02-29 10:51:05 -08:00
Alan Mishchenko 1bf2b0351a Added skipping &iso when there is only one PO. 2012-02-29 10:38:18 -08:00
Alan Mishchenko 0b1cfe886e Added switch -z to command 'removepo' to enable removing const1 outputs. 2012-02-27 17:50:48 -08:00
Alan Mishchenko b4fe108d86 Making BMC engines (bmc2, bmc3) to perform OR-decomposition by default. 2012-02-24 16:11:49 -08:00
Alan Mishchenko d80f43a185 Making BMC engines (bmc2, bmc3) to perform OR-decomposition by default. 2012-02-24 13:21:32 -08:00
Alan Mishchenko 1d25ae3b1a Experiment with technology mapping. 2012-02-22 17:54:24 -08:00
Alan Mishchenko d2cab85976 Adding flag -s to &put to disable status clearing. 2012-02-22 08:06:22 -08:00
Alan Mishchenko 8ba2398138 Undoing a previuos change to not reset the status after &put. 2012-02-22 00:46:52 -08:00
Alan Mishchenko e60d6c94a3 Experiment with technology mapping. 2012-02-20 21:33:51 -08:00
Alan Mishchenko 9f71a9f67b Isomorphism checking code. 2012-02-20 16:09:20 -08:00
Alan Mishchenko 2377ae60e9 Isomorphism checking code. 2012-02-19 14:52:43 -08:00