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5748 Commits

Author SHA1 Message Date
Alan Mishchenko ec70146d5d Experiments with exact synthesis. 2025-11-11 22:47:23 -08:00
Alan Mishchenko 3bd528c0bf Experiments with exact synthesis. 2025-11-11 22:41:26 -08:00
Alan Mishchenko 38c2bec1ff Adding support for Kissat in "lutexact". 2025-11-11 14:17:48 -08:00
Alan Mishchenko 3d281a1907 Adding support for Cadical in "lutexact". 2025-11-11 13:24:02 -08:00
Alan Mishchenko 91d2f3d7e8 Changes to "lutexact". 2025-11-11 06:55:24 -08:00
Alan Mishchenko 169e288fc4 Reading the printout. 2025-11-10 22:00:07 -08:00
Alan Mishchenko 1b7912a247 Update to the equation solver. 2025-11-10 21:03:21 -08:00
Alan Mishchenko 677299a52f Updating print-outs. 2025-11-10 09:40:38 -08:00
Alan Mishchenko 0a650c18cf New command "&genlutcas". 2025-11-09 16:06:50 -08:00
Alan Mishchenko 6cab944535 New command %gen. 2025-11-09 11:28:25 -08:00
alanminko 3109172462
Merge pull request #443 from MyskYko/fix4 
QBF using CaDiCaL
 2025-11-06 12:46:13 -08:00
Alan Mishchenko cb971e07a3 Recent experiments. 2025-11-06 12:26:54 -08:00
Alan Mishchenko 8f06ce9112 Enabling runtime limit in "lutexact". 2025-11-02 19:08:59 -08:00
Alan Mishchenko f897673f68 Fixing compilier issues. 2025-11-01 23:33:25 -07:00
Alan Mishchenko 800c274cc2 Linear equetion solver. 2025-11-01 22:55:14 -07:00
Alan Mishchenko 5273eab9f7 Fixing compilation problem. 2025-11-01 11:14:37 -07:00
Alan Mishchenko aac6190208 Extending support of CI/CO timing info. 2025-11-01 11:07:30 -07:00
Alan Mishchenko f808e2c68b Experiments with LUT mapping. 2025-11-01 10:47:00 -07:00
Alan Mishchenko 7c6b779327 Supporting programmable cell libraries. 2025-11-01 01:23:30 -07:00
Alan Mishchenko a9d62d845d Experiments with LUT mapping. 2025-11-01 01:21:37 -07:00
Alan Mishchenko 6034f6621b Changes to cut dumping. 2025-10-30 22:14:18 -07:00
Alan Mishchenko 56a7c049ae Extending max support size in "lutexact". 2025-10-30 16:35:15 -07:00
Alan Mishchenko 18f6464ec7 Experiments with LUT mapping. 2025-10-24 16:57:55 -07:00
Alan Mishchenko 3a1efd48f7 Enabling multiple LUT libraries. 2025-10-24 11:46:55 -07:00
Alan Mishchenko 4c6b082463 Reusing switch "-j" in "if" and "&if". 2025-10-24 10:59:56 -07:00
Alan Mishchenko 6fb4f739b0 Suppress a warning about uninitialized variable. 2025-10-24 10:58:38 -07:00
Alan Mishchenko f39b84a4a1 Fixing compilation problem. 2025-10-22 11:24:18 -07:00
Alan Mishchenko 93f3791fbe Command "&dg" contributed by Jiun-Hao Chen from NTU. 2025-10-22 11:15:07 -07:00
Miodrag Milanovic a1f5e4541b Fix compilation for mingw and wasi 2025-10-20 07:38:00 +02:00
Alan Mishchenko 7fbcde9d22 Correcting performance degradation introduced by a bug fix in commit e824cca0c 2025-10-10 13:47:23 -07:00
Alan Mishchenko c8eac7595d Another bug fix. 2025-10-01 22:23:27 -07:00
Alan Mishchenko 9596162b4a Bug fix in the previous commit. 2025-09-30 22:18:30 -07:00
Alan Mishchenko 4c25599cce Exploring multiplier boundaries. 2025-09-30 15:49:14 -07:00
Alan Mishchenko 613fa4f5eb Enable saving choices in &deepsyn. 2025-09-30 15:48:45 -07:00
Alan Mishchenko b28e042afd Compiler warning. 2025-09-16 02:45:58 +07:00
Alan Mishchenko 08230e0c31 Adding choice computaiton to &stochsyn. 2025-09-16 02:33:08 +07:00
Alan Mishchenko 745376d505 Reconstruction of structural choices. 2025-09-16 00:59:49 +07:00
Alan Mishchenko 9478c17288 Adding the dump of non-decomposable functions in "lutcasdec". 2025-08-31 20:18:30 -07:00
Alan Mishchenko 5adfd0030d Silencing benign assertion failure (Issue #428) 2025-08-29 18:41:38 -07:00
alanminko 4dfa49774f
Merge pull request #438 from chenjunhao0315/master 
rewire support timing-constraint
 2025-08-29 10:55:59 -07:00
jiunhaochen 4f29be9046 rewire support timing-constraint 2025-08-27 00:56:43 +08:00
Martin Povišer 3455f423d0 Fix capacitance unit parsing 
Fix the liberty parser to handle "capacitive_load_unit (1,fF)".
Previously this input would produce a corrupted internal representation
for the library as there would be an extra value written on line 944.
 2025-08-26 12:05:05 +02:00
Alan Mishchenko 279217b73d Updating procedures to dump cut info. 2025-08-18 22:00:43 -07:00
Alan Mishchenko 0e4a080779 Enabling "if" to dump the cut and truth table info. 2025-08-16 16:32:29 -07:00
Alan Mishchenko 192c161f93 Enabled default memory blasting when using Yosys. 2025-08-16 16:20:56 -07:00
Alan Mishchenko c5ceff2bee Dumping a binary file with truth tables in "if". 2025-08-12 16:00:26 -07:00
Alan Mishchenko e29dcd9f32 Adding a way to dump sets of resub problems. 2025-08-11 22:44:46 -07:00
Alan Mishchenko e7d360811f Fixed combo loop in choice computation. 2025-08-10 11:04:20 -07:00
Alan Mishchenko 15151c58ed Updating &stochsyn with switch '-d' to support level-preserving AIG optimizations. 2025-08-09 18:10:32 -07:00
Alan Mishchenko 00910e36ff Fixing typos. 2025-08-09 17:00:02 -07:00
Alan Mishchenko a5715bc32d Updates to the prefix tree generation. 2025-08-09 16:43:55 -07:00
Alan Mishchenko 5e09cca964 Handing the case of signed comparators. 2025-08-09 14:46:45 -07:00
Alan Mishchenko 1a18c9a3d8 : lutexact 2025-08-07 12:35:03 -07:00
Alan Mishchenko fd74cb8e8a Refactored the code to return prefix tree as an array of GP-nodes. 2025-08-07 10:51:05 -07:00
Alan Mishchenko 260fa85161 Fixing a linker problem. 2025-08-06 07:38:27 -07:00
Alan Mishchenko c738ed6e86 Integrating prefix adder generation code by Martin Povišer 2025-08-05 22:50:06 -07:00
Alan Mishchenko 0218e3e4cb New command for bound-set evaluation. 2025-08-03 20:10:26 -07:00
Alan Mishchenko aeef2c6692 Fixing compiler warning. 2025-08-02 08:58:01 -07:00
Alan Mishchenko 3aa8a4a639 New command to dump circuit structure into a file. 2025-08-02 08:53:22 -07:00
Alan Mishchenko c69e45916a Update &append to share primary inputs. 2025-08-01 14:29:45 -07:00
Alan Mishchenko 052a365823 Undoing previous commit. 2025-07-28 22:58:24 -07:00
Alan Mishchenko 705a3da338 Saving box info for XAIG created usign %blast. 2025-07-28 22:52:27 -07:00
Alan Mishchenko 4ccacb1e5b Adding printout of don't-cares after mapping. 2025-07-21 10:22:43 -07:00
Alan Mishchenko ff56eed4b3 Allowing "lutexact" to take truth table from the current network. 2025-07-21 07:56:30 -07:00
Alan Mishchenko a511d753a6 Improvements to "lutcasdec". 2025-07-20 18:29:20 -07:00
Alan Mishchenko d0118d3917 Adding JSONC parser. 2025-07-14 10:34:24 -07:00
Alan Mishchenko c4c401b7a5 Fixing pointer-dependent behavior during BDD variable reordering. 2025-07-13 20:58:34 -07:00
Alan Mishchenko 990abc4349 Extending external AIG APIs. 2025-07-08 19:26:10 -07:00
Alan Mishchenko f1eebf78f4 Updating command "runscript". 2025-07-08 19:06:04 -07:00
alanminko 0dc5524b80
Merge pull request #425 from MyskYko/fix3 
fix cadical
 2025-07-07 03:44:24 -07:00
MyskYko 13205ccbb3 qbf with cadical 2025-06-21 01:29:26 -07:00
MyskYko 5e03f9fefa more APIs in cadical 2025-06-20 15:55:31 -07:00
MyskYko 6e130c15a3 fix setnvars 2025-06-20 15:28:27 -07:00
MyskYko 9ea1aaa3cf fix comments 2025-06-20 14:45:50 -07:00
MyskYko a5156f257e fix cadical 2025-06-20 13:40:04 -07:00
Alan Mishchenko beff7f1b34 Temporary fix of the compilation problem related to sorting objects by level in rewiring. 2025-06-19 14:32:10 +07:00
alanminko 83824878e3
Merge pull request #422 from MyskYko/fix 
fix amap -m
 2025-06-17 21:20:28 -07:00
MyskYko e9845e534a fix a bug when yosys constants are already declared 2025-06-17 16:41:43 -07:00
MyskYko f443db4a24 fix amap -m 2025-06-16 10:27:33 -07:00
Alan Mishchenko 6463f11625 Fixing pointer-dependent behavior during BDD variable reordering. 2025-06-07 12:52:23 -07:00
alanminko afae379366
Merge pull request #419 from mikesinouye/multilib 
Prevent merged scl filename size from growing unbounded.
 2025-06-07 10:38:15 -07:00
alanminko 5cf5a8d9f5
Merge pull request #412 from tklam/feature/support_verilog_gate_name 
Support primitive gates with names in Verilog netlist
 2025-06-07 10:38:03 -07:00
Mike Inouye a4064b8b73 Prevent merged scl filename size from growing unbounded, which limits upper bound of files loaded. 2025-05-30 18:14:47 +00:00
alanminko 0a55186553
Merge pull request #416 from chenjunhao0315/master 
patch rewire with empty name
 2025-05-25 22:27:43 -07:00
Alan Mishchenko 1f98c28011 Improved cascade printout in "lutcasdec". 2025-05-25 22:24:33 -07:00
Alan Mishchenko 301b46e3c1 Fixiing BLIF reader to read Yosys constants. 2025-05-25 18:45:59 -07:00
jiunhaochen 04161dfda8 patch rewire with empty name 2025-05-26 01:44:04 +08:00
Alan Mishchenko 0ae04514cd Work-around for a bug in "lutcasdec". 2025-05-22 23:56:40 -07:00
Alan Mishchenko 716314d835 Generating AIGs for adders. 2025-05-22 23:56:13 -07:00
Alan Mishchenko 32fe49b6d1 New commands for reading/writing mini-mapping for AIGs. 2025-05-21 21:57:51 -07:00
Alan Mishchenko e1a1994292 Extending "&cofs" to handle multi-output AIGs. 2025-05-21 21:30:58 -07:00
alanminko 0c155952bf
Merge pull request #415 from HAHHHD/master 
add clause pushing with blocking
 2025-05-20 16:37:20 -07:00
Alan Mishchenko 3bd7bac552 Improvements to "lutcasdec". 2025-05-20 16:17:43 -07:00
HAHHHD e20c484ee1 add clause pushing with blocking 2025-05-20 15:04:15 -07:00
Alan Mishchenko c5edc566ff Improvements to "lutcasdec". 2025-05-20 14:28:07 -07:00
Alan Mishchenko 29c8d3eacf Improvements to "lutcasdec". 2025-05-20 10:41:47 -07:00
Alan Mishchenko 9bb736acee Improvements to "lutcasdec". 2025-05-20 06:39:28 -07:00
Alan Mishchenko c398b06740 Experiments with decomposition. 2025-05-20 06:08:46 -07:00
Alan Mishchenko 240bf58f90 Updating "short_names" and BDD profiling. 2025-05-19 10:24:56 -07:00
Alan Mishchenko 916f70058e Updating script runner. 2025-05-18 14:05:50 -07:00