mirror of https://github.com/YosysHQ/abc.git
Experiments with LUT mapping.
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7c6b779327
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@ -1549,7 +1549,7 @@ void Gia_AigerWriteS( Gia_Man_t * pInit, char * pFileName, int fWriteSymbols, in
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if ( p->vConfigs2 )
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{
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int nTotalSize, nInstances = 0;
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If_LibCell_t * pLibCell = NULL; // (If_LibCell_t *)Abc_FrameReadLibCell();
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If_LibCell_t * pLibCell = (If_LibCell_t *)Abc_FrameReadLibCell();
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char *pCell0, *pCell1, *pCell2;
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// Get formulas from cell library or use defaults
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@ -1188,8 +1188,6 @@ int Gia_ManFromIfLogicCreateLutSpecial( Gia_Man_t * pNew, word * pRes, Vec_Int_t
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***********************************************************************/
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int Gia_ManFromIfLogicCreateLutSpecialJ( Gia_Man_t * pNew, word * pRes, Vec_Int_t * vLeaves, Vec_Int_t * vLeavesTemp, Vec_Int_t * vCover, Vec_Int_t * vMapping, Vec_Int_t * vMapping2, Vec_Int_t * vPacking )
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{
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return Gia_ManFromIfLogicCreateLut( pNew, pRes, vLeaves, vCover, vMapping, vMapping2 );
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word Truth;
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int i, iObjLit1, iObjLit2, iObjLit3;
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word z = If_CutPerformDeriveJ( NULL, (unsigned *)pRes, Vec_IntSize(vLeaves), Vec_IntSize(vLeaves), NULL, 1 );
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@ -1294,31 +1292,13 @@ int Gia_ManFromIfLogicCreateLutSpecialJ( Gia_Man_t * pNew, word * pRes, Vec_Int_
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***********************************************************************/
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int Gia_ManFromIfLogicNode( void * pIfMan, Gia_Man_t * pNew, int iObj, Vec_Int_t * vLeaves, Vec_Int_t * vLeavesTemp,
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word * pRes, char * pStr, Vec_Int_t * vCover, Vec_Int_t * vMapping, Vec_Int_t * vMapping2, Vec_Int_t * vPacking, int fCheck75, int fEnableCheck07 )
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word * pRes, char * pStr, Vec_Int_t * vCover, Vec_Int_t * vMapping, Vec_Int_t * vMapping2, Vec_Int_t * vPacking, int fCheck75 )
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{
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int nLeaves = Vec_IntSize(vLeaves);
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int i, Length, nLutLeaf, nLutLeaf2, nLutRoot, iObjLit1, iObjLit2, iObjLit3;
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// workaround for the special case
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if ( fCheck75 )
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pStr = "54";
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// perform special case matching for 44
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if ( fEnableCheck07 )
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{
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if ( 0 && Vec_IntSize(vLeaves) <= 4 )
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{
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// create mapping
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iObjLit1 = Gia_ManFromIfLogicCreateLut( pNew, pRes, vLeaves, vCover, vMapping, vMapping2 );
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// write packing
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if ( !Gia_ObjIsCi(Gia_ManObj(pNew, Abc_Lit2Var(iObjLit1))) && iObjLit1 > 1 )
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{
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Vec_IntPush( vPacking, 1 );
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Vec_IntPush( vPacking, Abc_Lit2Var(iObjLit1) );
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Vec_IntAddToEntry( vPacking, 0, 1 );
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}
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return iObjLit1;
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}
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return Gia_ManFromIfLogicCreateLutSpecialJ( pNew, pRes, vLeaves, vLeavesTemp, vCover, vMapping, vMapping2, vPacking );
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}
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if ( ((If_Man_t *)pIfMan)->pPars->fLut6Filter && Vec_IntSize(vLeaves) == 6 )
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{
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extern word If_Dec6Perform( word t, int fDerive );
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@ -2034,13 +2014,13 @@ void Gia_ManConfigPrint( word Truth4, word z, int nLeaves )
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SeeAlso []
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***********************************************************************/
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void Gia_ManFromIfGetConfig2( Vec_Str_t * vConfigs2, If_Man_t * pIfMan, If_Cut_t * pCutBest )
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void Gia_ManFromIfGetConfig2( Vec_Str_t * vConfigs2, If_Man_t * pIfMan, word * pTruth, int nLeaves )
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{
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int i, CellId, nBytes;
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int startPos = Vec_StrSize(vConfigs2);
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// Determine cell type based on the number of leaves and configuration
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if ( pCutBest->nLeaves <= 4 )
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if ( nLeaves <= 4 )
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{
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// Cell type 0: Simple LUT4
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CellId = 0;
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@ -2048,7 +2028,7 @@ void Gia_ManFromIfGetConfig2( Vec_Str_t * vConfigs2, If_Man_t * pIfMan, If_Cut_t
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// Write CellId
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Vec_StrPush( vConfigs2, (char)CellId );
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// Write truth table (16 bits for LUT4)
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word Truth = *If_CutTruthW(pIfMan, pCutBest);
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word Truth = pTruth[0];
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Vec_StrPush( vConfigs2, (char)(Truth & 0xFF) );
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Vec_StrPush( vConfigs2, (char)((Truth >> 8) & 0xFF) );
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// Pad to 4-byte boundary
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@ -2058,7 +2038,7 @@ void Gia_ManFromIfGetConfig2( Vec_Str_t * vConfigs2, If_Man_t * pIfMan, If_Cut_t
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}
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else
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{
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word z = If_CutPerformDeriveJ( pIfMan, (unsigned *)If_CutTruthW(pIfMan, pCutBest), pCutBest->nLeaves, pCutBest->nLeaves, NULL, 1 );
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word z = If_CutPerformDeriveJ( pIfMan, (unsigned *)pTruth, nLeaves, nLeaves, NULL, 1 );
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//Gia_ManConfigPrint( 0, z, pCutBest->nLeaves );
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if ( ((z >> 63) & 1) == 0 )
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{
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@ -2070,7 +2050,7 @@ void Gia_ManFromIfGetConfig2( Vec_Str_t * vConfigs2, If_Man_t * pIfMan, If_Cut_t
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for ( i = 0; i < 4; i++ )
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{
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int v = (int)((z >> (16 + (i << 2))) & 7);
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if ( v == 6 && pCutBest->nLeaves == 5 )
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if ( v == 6 && nLeaves == 5 )
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mappingBytes[i / 2] |= (0 << ((i % 2) * 4)); // constant 0
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else
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mappingBytes[i / 2] |= ((v+2) << ((i % 2) * 4)); // leaf v (direct mapping)
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@ -2082,7 +2062,7 @@ void Gia_ManFromIfGetConfig2( Vec_Str_t * vConfigs2, If_Man_t * pIfMan, If_Cut_t
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for ( i = 0; i < 4; i++ )
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{
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int v = (int)((z >> (48 + (i << 2))) & 7);
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if ( v == 6 && pCutBest->nLeaves == 5 )
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if ( v == 6 && nLeaves == 5 )
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mappingBytes[i / 2] |= (0 << ((i % 2) * 4)); // constant 0
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else if ( v == 7 )
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mappingBytes[i / 2] |= ((7+2) << ((i % 2) * 4)); // output of first LUT at index N+2 where N=7
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@ -2351,7 +2331,7 @@ Gia_Man_t * Gia_ManFromIfLogic( If_Man_t * pIfMan )
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// start mapping and packing
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vMapping = Vec_IntStart( If_ManObjNum(pIfMan) );
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vMapping2 = Vec_IntStart( 1 );
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if ( pIfMan->pPars->fDeriveLuts && (pIfMan->pPars->pLutStruct || pIfMan->pPars->fEnableCheck75 || pIfMan->pPars->fEnableCheck75u || pIfMan->pPars->fEnableCheck07) )
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if ( pIfMan->pPars->fDeriveLuts && (pIfMan->pPars->pLutStruct || pIfMan->pPars->fEnableCheck75 || pIfMan->pPars->fEnableCheck75u) )
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{
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vPacking = Vec_IntAlloc( 1000 );
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Vec_IntPush( vPacking, 0 );
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@ -2452,15 +2432,20 @@ Gia_Man_t * Gia_ManFromIfLogic( If_Man_t * pIfMan )
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if ( If_CutLeafBit(pCutBest, k) )
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Abc_TtFlip( pTruth, Abc_TtWordNum(pCutBest->nLeaves), k );
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// perform decomposition of the cut
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pIfObj->iCopy = Gia_ManFromIfLogicNode( pIfMan, pNew, i, vLeaves, vLeaves2, pTruth, pIfMan->pPars->pLutStruct, vCover, vMapping, vMapping2, vPacking, (pIfMan->pPars->fEnableCheck75 || pIfMan->pPars->fEnableCheck75u), pIfMan->pPars->fEnableCheck07 );
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if ( pIfMan->pPars->fEnableCheck07 )
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pIfObj->iCopy = Gia_ManFromIfLogicCreateLut( pNew, pTruth, vLeaves, vCover, vMapping, vMapping2 );
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else
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pIfObj->iCopy = Gia_ManFromIfLogicNode( pIfMan, pNew, i, vLeaves, vLeaves2, pTruth, pIfMan->pPars->pLutStruct, vCover, vMapping, vMapping2, vPacking, (pIfMan->pPars->fEnableCheck75 || pIfMan->pPars->fEnableCheck75u) );
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pIfObj->iCopy = Abc_LitNotCond( pIfObj->iCopy, pCutBest->fCompl );
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if ( vConfigs && Vec_IntSize(vLeaves) > 1 && !Gia_ObjIsCi(Gia_ManObj(pNew, Abc_Lit2Var(pIfObj->iCopy))) && pIfObj->iCopy > 1 )
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Gia_ManFromIfGetConfig( vConfigs, pIfMan, pCutBest, pIfObj->iCopy, vConfigsStr );
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else if ( vConfigs2 && Vec_IntSize(vLeaves) > 1 && !Gia_ObjIsCi(Gia_ManObj(pNew, Abc_Lit2Var(pIfObj->iCopy))) && pIfObj->iCopy > 1 ) {
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assert( pCutBest->fCompl == 0 );
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//pCutBest->iCutFunc = Abc_LitNotCond( pCutBest->iCutFunc, Abc_LitIsCompl(pIfObj->iCopy) );
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Gia_ManFromIfGetConfig2( vConfigs2, pIfMan, pCutBest );
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//pCutBest->iCutFunc = Abc_LitNotCond( pCutBest->iCutFunc, Abc_LitIsCompl(pIfObj->iCopy) );
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If_CutForEachLeaf( pIfMan, pCutBest, pIfLeaf, k )
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if ( Abc_LitIsCompl(pIfLeaf->iCopy) )
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Abc_TtFlip( pTruth, Abc_TtWordNum(pCutBest->nLeaves), k );
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if ( Abc_LitIsCompl(pIfObj->iCopy) ^ pCutBest->fCompl )
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Abc_TtNot( pTruth, Abc_TtWordNum(pCutBest->nLeaves) );
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Gia_ManFromIfGetConfig2( vConfigs2, pIfMan, pTruth, pCutBest->nLeaves );
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}
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}
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else
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@ -2474,8 +2459,6 @@ Gia_Man_t * Gia_ManFromIfLogic( If_Man_t * pIfMan )
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Vec_IntForEachEntry( vLeaves, Entry, k )
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Vec_IntPush( vMapping2, Abc_Lit2Var(Entry) );
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Vec_IntPush( vMapping2, Abc_Lit2Var(pIfObj->iCopy) );
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//if ( pIfMan->pPars->fEnableCheck07 && vConfigs2 && Vec_IntSize(vLeaves) > 1 )
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// Gia_ManFromIfGetConfig2( vConfigs2, pIfMan, pCutBest );
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}
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}
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else if ( If_ObjIsCi(pIfObj) )
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