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5,879 Commits 27 Branches 57 Tags 58 MiB
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5879 Commits

Author SHA1 Message Date
Alan Mishchenko 0e4a080779 Enabling "if" to dump the cut and truth table info. 2025-08-16 16:32:29 -07:00
Alan Mishchenko 192c161f93 Enabled default memory blasting when using Yosys. 2025-08-16 16:20:56 -07:00
Alan Mishchenko c5ceff2bee Dumping a binary file with truth tables in "if". 2025-08-12 16:00:26 -07:00
Alan Mishchenko e29dcd9f32 Adding a way to dump sets of resub problems. 2025-08-11 22:44:46 -07:00
Alan Mishchenko e7d360811f Fixed combo loop in choice computation. 2025-08-10 11:04:20 -07:00
Alan Mishchenko 15151c58ed Updating &stochsyn with switch '-d' to support level-preserving AIG optimizations. 2025-08-09 18:10:32 -07:00
Alan Mishchenko 00910e36ff Fixing typos. 2025-08-09 17:00:02 -07:00
Alan Mishchenko a5715bc32d Updates to the prefix tree generation. 2025-08-09 16:43:55 -07:00
Alan Mishchenko 5e09cca964 Handing the case of signed comparators. 2025-08-09 14:46:45 -07:00
Alan Mishchenko 1a18c9a3d8 : lutexact 2025-08-07 12:35:03 -07:00
Alan Mishchenko fd74cb8e8a Refactored the code to return prefix tree as an array of GP-nodes. 2025-08-07 10:51:05 -07:00
Alan Mishchenko 260fa85161 Fixing a linker problem. 2025-08-06 07:38:27 -07:00
Alan Mishchenko c738ed6e86 Integrating prefix adder generation code by Martin Povišer 2025-08-05 22:50:06 -07:00
Alan Mishchenko 0218e3e4cb New command for bound-set evaluation. 2025-08-03 20:10:26 -07:00
Alan Mishchenko aeef2c6692 Fixing compiler warning. 2025-08-02 08:58:01 -07:00
Alan Mishchenko 3aa8a4a639 New command to dump circuit structure into a file. 2025-08-02 08:53:22 -07:00
Alan Mishchenko c69e45916a Update &append to share primary inputs. 2025-08-01 14:29:45 -07:00
Alan Mishchenko 052a365823 Undoing previous commit. 2025-07-28 22:58:24 -07:00
Alan Mishchenko 705a3da338 Saving box info for XAIG created usign %blast. 2025-07-28 22:52:27 -07:00
Alan Mishchenko 4ccacb1e5b Adding printout of don't-cares after mapping. 2025-07-21 10:22:43 -07:00
Alan Mishchenko ff56eed4b3 Allowing "lutexact" to take truth table from the current network. 2025-07-21 07:56:30 -07:00
Alan Mishchenko a511d753a6 Improvements to "lutcasdec". 2025-07-20 18:29:20 -07:00
Alan Mishchenko d0118d3917 Adding JSONC parser. 2025-07-14 10:34:24 -07:00
Alan Mishchenko c4c401b7a5 Fixing pointer-dependent behavior during BDD variable reordering. 2025-07-13 20:58:34 -07:00
Alan Mishchenko 990abc4349 Extending external AIG APIs. 2025-07-08 19:26:10 -07:00
Alan Mishchenko f1eebf78f4 Updating command "runscript". 2025-07-08 19:06:04 -07:00
alanminko 0dc5524b80
Merge pull request #425 from MyskYko/fix3 
fix cadical
 2025-07-07 03:44:24 -07:00
MyskYko 6e130c15a3 fix setnvars 2025-06-20 15:28:27 -07:00
MyskYko 9ea1aaa3cf fix comments 2025-06-20 14:45:50 -07:00
MyskYko a5156f257e fix cadical 2025-06-20 13:40:04 -07:00
Alan Mishchenko beff7f1b34 Temporary fix of the compilation problem related to sorting objects by level in rewiring. 2025-06-19 14:32:10 +07:00
alanminko 83824878e3
Merge pull request #422 from MyskYko/fix 
fix amap -m
 2025-06-17 21:20:28 -07:00
alanminko da52efecdc
Merge pull request #423 from MyskYko/fix2 
fix a bug when yosys constants are already declared
 2025-06-17 21:19:55 -07:00
MyskYko e9845e534a fix a bug when yosys constants are already declared 2025-06-17 16:41:43 -07:00
MyskYko f443db4a24 fix amap -m 2025-06-16 10:27:33 -07:00
Alan Mishchenko 6463f11625 Fixing pointer-dependent behavior during BDD variable reordering. 2025-06-07 12:52:23 -07:00
alanminko 44f3265e8b
Merge pull request #397 from phyzhenli/patch-1 
fix typo
 2025-06-07 10:39:21 -07:00
alanminko afae379366
Merge pull request #419 from mikesinouye/multilib 
Prevent merged scl filename size from growing unbounded.
 2025-06-07 10:38:15 -07:00
alanminko 5cf5a8d9f5
Merge pull request #412 from tklam/feature/support_verilog_gate_name 
Support primitive gates with names in Verilog netlist
 2025-06-07 10:38:03 -07:00
alanminko d4358ec80c
Merge pull request #399 from wjrforcyber/gtest_refactor 
Refactor(gtest): Remove duplicate libgtest.a
 2025-06-07 10:37:53 -07:00
Mike Inouye a4064b8b73 Prevent merged scl filename size from growing unbounded, which limits upper bound of files loaded. 2025-05-30 18:14:47 +00:00
alanminko 0a55186553
Merge pull request #416 from chenjunhao0315/master 
patch rewire with empty name
 2025-05-25 22:27:43 -07:00
Alan Mishchenko 1f98c28011 Improved cascade printout in "lutcasdec". 2025-05-25 22:24:33 -07:00
Alan Mishchenko 301b46e3c1 Fixiing BLIF reader to read Yosys constants. 2025-05-25 18:45:59 -07:00
jiunhaochen 04161dfda8 patch rewire with empty name 2025-05-26 01:44:04 +08:00
Alan Mishchenko 0ae04514cd Work-around for a bug in "lutcasdec". 2025-05-22 23:56:40 -07:00
Alan Mishchenko 716314d835 Generating AIGs for adders. 2025-05-22 23:56:13 -07:00
Alan Mishchenko 32fe49b6d1 New commands for reading/writing mini-mapping for AIGs. 2025-05-21 21:57:51 -07:00
Alan Mishchenko e1a1994292 Extending "&cofs" to handle multi-output AIGs. 2025-05-21 21:30:58 -07:00
alanminko 0c155952bf
Merge pull request #415 from HAHHHD/master 
add clause pushing with blocking
 2025-05-20 16:37:20 -07:00