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5281 Commits

Author SHA1 Message Date
Martin Povišer 03da96f12f Patch for lack of `system` on WASM 2024-04-23 13:49:12 +02:00
Martin Povišer b502f00222 Fix prototype mismatch for `Gia_ManSimRsb` 2024-04-22 17:39:32 +02:00
Martin Povišer 208b48667f Merge branch 'master' of https://github.com/berkeley-abc/abc into yosys-experimental 2024-04-22 16:33:29 +02:00
Peter Gadfort de060a26ad ensure initial library writing also honors prefix 2024-04-16 08:58:28 -04:00
Alan Mishchenko bc725b85de Bug fix in CNF generation for &glucose (three more places). 2024-04-15 20:29:38 -07:00
Alan Mishchenko 2d6b5c9adc Bug fix in CNF generation for &glucose. 2024-04-15 20:25:43 -07:00
Alan Mishchenko 99e0e37da6 Added switch -p in "read_lib" to skip writing cell prefix. 2024-04-14 09:51:00 -07:00
Peter Gadfort 935c6a875d add missing flag to read_lib help 2024-04-12 13:49:44 -04:00
Peter Gadfort 1d90cafd54 add library merging flag to read_lib 
Signed-off-by: Peter Gadfort <gadfort@zeroasic.com>
 2024-04-12 13:27:58 -04:00
aletempiac 045803dcb8 Merge remote-tracking branch 'origin/master' into acd66 2024-04-11 19:02:29 +02:00
aletempiac 0c905f873b Fixes 2024-04-11 19:01:05 +02:00
aletempiac 6052d10fde Adding new command if -U for 2-LUT decompositions under delay profile 2024-04-11 15:45:37 +02:00
aletempiac e8924e5534 Fixes and improvements 2024-04-11 15:44:52 +02:00
aletempiac 5b49724fcc removing acd666 2024-04-11 15:43:22 +02:00
N. Engelhardt 078afe9faa
Merge pull request #31 from davidar/fix-55 
Fix Assertion using &if: `pCutSet->nCuts > 0'
 2024-04-11 14:41:43 +02:00
Alan Mishchenko ca78f5e6e5 Bug fix in the resub engine. 2024-04-11 05:05:52 -07:00
aletempiac 32bc1d4ab2 Cleaning and generalizing code 2024-04-11 11:31:28 +02:00
aletempiac 64fea5c4c2 Improving the performance and quality of acd66 2024-04-10 18:43:52 +02:00
aletempiac 6b5ebb3e76 Removing assertion when decomposing into LUTs smaller than 6 2024-04-10 18:42:52 +02:00
aletempiac 8f3447800c Support again decompositions into luts smaller than 6 2024-04-02 11:25:03 +02:00
David A Roberts accf50468a Apply patch to If_ObjPerformMappingChoice too 2024-04-01 10:03:10 +10:00
David A Roberts 316eec6d3f Fix Assertion using &if: `pCutSet->nCuts > 0' 2024-04-01 09:40:41 +10:00
Alan Mishchenko 6e1653426f Switch to randomly select one choice. 2024-03-28 16:22:06 +08:00
Alan Mishchenko a2cb5eb4e3 Adding command &pms to print miter status. 2024-03-25 23:39:03 +08:00
aletempiac 1f72ffce79 Improving ACD performance with bail-out conditions 2024-03-25 14:23:43 +01:00
Alan Mishchenko b0d2ff1c63 Exact synthesis using NAND-gates. 2024-03-24 00:10:08 +09:00
Martin Povišer 1107634fa6 &mfs: Make it no biggie when a network is all blackboxes, no whiteboxes 2024-03-22 22:47:40 +01:00
Martin Povišer d7fc8fe98f &mfs: Handle blackboxes robustly 
When the network is being handed over to the "sfm" core, all blackboxes
are modeled by inserting new PIs, POs, and those being connected by
buffers to the nodes representing the CIs, COs. Make two changes:

 * Robustly deny the fake PIs from being considered when shopping for
   LUT fanin substitutions. Such reconnection occurring would trip up
   the code reintegrating the result.

 * Make sure the buffer connecting the fake-PO to the CO doesn't get
   rewritten as part of the `mfs` transformation, and extend this
   protection to any whitebox models.
 2024-03-22 22:43:08 +01:00
Martin Povišer fda490235e &mfs: Fix issues with traversal when re-importing network 
The former implementation of `Sfm_NtkDfs` was trying to serialize the
network while ordering all box inputs ahead of the box outputs. This is
sometimes impossible, leaving the result unordered, which led to crashes
in the `&mfs` code when it was reintegrating the result into the GIA
structure:

  ABC: Assertion failed: iLitNew >= 0 (src/aig/gia/giaMfs.c: Gia_ManInsertMfs: 388)

With a small change to `Gia_ManInsertMfs` which does the reintegration
we don't really need the ordering to see through boxes, ordering on the
paths between boxes is sufficient. Relaxing the ordering requirement, we
make `Sfm_NtkDfs` robust.
 2024-03-22 22:01:45 +01:00
Martin Povišer b83985c25b Add `&mfs -r` for re-import testing 2024-03-22 21:42:12 +01:00
aletempiac 6aacf524aa Performance improvement and fixes 2024-03-22 19:19:35 +01:00
aletempiac 8a314db8dc Bug fix 2024-03-22 15:39:52 +01:00
Alan Mishchenko 2c0943ff62 Fixiing compiler problem on Windows. 2024-03-19 09:34:20 +09:00
Alan Mishchenko 5d3d77fcfe Fixing Windows compiler problem. 2024-03-19 08:54:32 +09:00
Alan Mishchenko c32f36af08 Fixing c vs c++ header file issue. 2024-03-19 08:13:07 +09:00
Alan Mishchenko b31ab1960b Fixing compilation issues on Windows. 2024-03-18 21:30:46 +09:00
aletempiac db72df7a63 Merge remote-tracking branch 'origin/master' into acd66 2024-03-18 10:08:48 +01:00
aletempiac 3737a69d8d Adding new ACD66 with support for multiple shared-set variables 2024-03-18 10:01:59 +01:00
Alan Mishchenko 210474b08c Bug fix in &gen_hie. 2024-03-18 07:49:35 +09:00
alanminko 3040b8ddd5
Merge pull request #282 from allen1236/master 
&brecover with speculative reduction
 2024-03-16 08:52:57 +09:00
Allen Ho b7884aaf2b clean up & add options for &brecover 2024-03-16 01:40:11 +08:00
Allen Ho 015dd2a367 use speculative in &brecover 2024-03-15 16:56:10 +08:00
Alan Mishchenko a16a0f1027 Writing Verilog for AIG using NAND gates. 2024-03-06 01:40:48 -08:00
Allen Ho d87b1cd543 fixed some warnings in bsat2 2024-03-04 10:16:14 +08:00
Allen Ho bfbec71211 &stc_eco and &brecover done 2024-03-04 09:36:35 +08:00
Allen Ho bcf04fadb6 &brecover done 2024-03-04 00:54:23 +08:00
Alan Mishchenko a747f46292 More changes to compile with g++. 2024-03-02 17:21:05 -08:00
Alan Mishchenko eb24d29777 More changes. 2024-03-02 17:10:30 -08:00
Alan Mishchenko b73f1030a6 More changes. 2024-03-02 17:03:42 -08:00
Alan Mishchenko b627aa7cb5 More changes. 2024-03-02 16:57:00 -08:00