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Enabled reading the EXDC network by the default BLIF reader.

This commit is contained in:
Alan Mishchenko 2013-04-18 17:39:13 -07:00
parent 96b784ecd7
commit c80fce00fe
2 changed files with 29 additions and 5 deletions
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32
src/base/io/ioReadBlifMv.c
View File

@ -143,7 +143,7 @@ Abc_Ntk_t * Io_ReadBlifMv( char * pFileName, int fBlifMv, int fCheck )
{ {
FILE * pFile; FILE * pFile;
Io_MvMan_t * p; Io_MvMan_t * p;
Abc_Ntk_t * pNtk; Abc_Ntk_t * pNtk, * pExdc;
Abc_Lib_t * pDesign = NULL; Abc_Lib_t * pDesign = NULL;
char * pDesignName; char * pDesignName;
int RetValue, i; int RetValue, i;
@ -205,6 +205,23 @@ Abc_Ntk_t * Io_ReadBlifMv( char * pFileName, int fBlifMv, int fCheck )
//Abc_LibPrint( pDesign ); //Abc_LibPrint( pDesign );
// check if there is an EXDC network
if ( Vec_PtrSize(pDesign->vModules) > 1 )
{
pNtk = (Abc_Ntk_t *)Vec_PtrEntry(pDesign->vModules, 0);
Vec_PtrForEachEntryStart( Abc_Ntk_t *, pDesign->vModules, pExdc, i, 1 )
if ( !strcmp(pExdc->pName, "exdc") )
{
assert( pNtk->pExdc == NULL );
pNtk->pExdc = pExdc;
Vec_PtrRemove(pDesign->vModules, pExdc);
pExdc->pDesign = NULL;
i--;
}
else
pNtk = pExdc;
}
// detect top-level model // detect top-level model
RetValue = Abc_LibFindTopLevelModels( pDesign ); RetValue = Abc_LibFindTopLevelModels( pDesign );
pNtk = (Abc_Ntk_t *)Vec_PtrEntry( pDesign->vTops, 0 ); pNtk = (Abc_Ntk_t *)Vec_PtrEntry( pDesign->vTops, 0 );
@ -661,11 +678,12 @@ static void Io_MvReadPreparse( Io_MvMan_t * p )
} }
else if ( !strncmp(pCur, "exdc", 4) ) else if ( !strncmp(pCur, "exdc", 4) )
{ {
fprintf( stdout, "Line %d: Skipping EXDC network.\n", Io_MvGetLine(p, pCur) ); fprintf( stdout, "Line %d: The design contains EXDC network (warning only).\n", Io_MvGetLine(p, pCur) );
// break;
if ( p->pLatest ) if ( p->pLatest )
Vec_PtrPush( p->vModels, p->pLatest ); Vec_PtrPush( p->vModels, p->pLatest );
p->pLatest = NULL; p->pLatest = Io_MvModAlloc();
p->pLatest->pName = NULL;
p->pLatest->pMan = p;
} }
else if ( !strncmp(pCur, "attrib", 6) ) else if ( !strncmp(pCur, "attrib", 6) )
{} {}
@ -907,6 +925,12 @@ static int Io_MvParseLineModel( Io_MvMod_t * p, char * pLine )
{ {
Vec_Ptr_t * vTokens = p->pMan->vTokens; Vec_Ptr_t * vTokens = p->pMan->vTokens;
char * pToken, * pPivot; char * pToken, * pPivot;
if ( pLine == NULL )
{
p->pNtk = Abc_NtkAlloc( ABC_NTK_NETLIST, ABC_FUNC_SOP, 1 );
p->pNtk->pName = Extra_UtilStrsav( "exdc" );
return 1;
}
Io_MvSplitIntoTokens( vTokens, pLine, '\0' ); Io_MvSplitIntoTokens( vTokens, pLine, '\0' );
pToken = (char *)Vec_PtrEntry( vTokens, 0 ); pToken = (char *)Vec_PtrEntry( vTokens, 0 );
assert( !strcmp(pToken, "model") ); assert( !strcmp(pToken, "model") );

2
src/base/io/ioUtil.c
View File

@ -229,9 +229,9 @@ Abc_Ntk_t * Io_Read( char * pFileName, Io_FileType_t FileType, int fCheck )
Vec_Ptr_t * vLtl; Vec_Ptr_t * vLtl;
// get the netlist // get the netlist
pNtk = Io_ReadNetlist( pFileName, FileType, fCheck ); pNtk = Io_ReadNetlist( pFileName, FileType, fCheck );
vLtl = temporaryLtlStore( pNtk );
if ( pNtk == NULL ) if ( pNtk == NULL )
return NULL; return NULL;
vLtl = temporaryLtlStore( pNtk );
if ( !Abc_NtkIsNetlist(pNtk) ) if ( !Abc_NtkIsNetlist(pNtk) )
return pNtk; return pNtk;
// flatten logic hierarchy // flatten logic hierarchy