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Fixing the way constants are written into mapped Verilog files.

This commit is contained in:
Alan Mishchenko 2012-08-31 00:05:10 -07:00
parent 5a009b6774
commit a49ba2d280
1 changed files with 5 additions and 0 deletions
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5
src/base/io/ioWriteVerilog.c
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@ -523,6 +523,11 @@ void Io_WriteVerilogObjects( FILE * pFile, Abc_Ntk_t * pNtk )
{
Mio_Gate_t * pGate = (Mio_Gate_t *)pObj->pData;
Mio_Pin_t * pGatePin;
if ( Abc_ObjFaninNum(pObj) == 0 )
{
fprintf( pFile, " %-*s %s = 1\'b%d;\n", Length, "assign", Io_WriteVerilogGetName(Abc_ObjName( Abc_ObjFanout0(pObj) )), !strcmp(Mio_GateReadName(pGate), "_const1_") );
continue;
}
// write the node
fprintf( pFile, " %-*s g%0*d", Length, Mio_GateReadName(pGate), nDigits, Counter++ );
fprintf( pFile, "(" );