From a49ba2d2806f96121f1fdd5c37ff2f6e369b9762 Mon Sep 17 00:00:00 2001
From: Alan Mishchenko <alanmi@berkeley.edu>
Date: Fri, 31 Aug 2012 00:05:10 -0700
Subject: [PATCH] Fixing the way constants are written into mapped Verilog
 files.

---
 src/base/io/ioWriteVerilog.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/base/io/ioWriteVerilog.c b/src/base/io/ioWriteVerilog.c
index ae233879f..0b5ad269d 100644
--- a/src/base/io/ioWriteVerilog.c
+++ b/src/base/io/ioWriteVerilog.c
@@ -523,6 +523,11 @@ void Io_WriteVerilogObjects( FILE * pFile, Abc_Ntk_t * pNtk )
         {
             Mio_Gate_t * pGate = (Mio_Gate_t *)pObj->pData;
             Mio_Pin_t * pGatePin;
+            if ( Abc_ObjFaninNum(pObj) == 0 )
+            {
+                fprintf( pFile, "  %-*s %s = 1\'b%d;\n", Length, "assign", Io_WriteVerilogGetName(Abc_ObjName( Abc_ObjFanout0(pObj) )), !strcmp(Mio_GateReadName(pGate), "_const1_") );
+                continue;
+            }
             // write the node
             fprintf( pFile, "  %-*s g%0*d", Length, Mio_GateReadName(pGate), nDigits, Counter++ );
             fprintf( pFile, "(" );