mirror of https://github.com/YosysHQ/abc.git
Bug fix in incremental timing.
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573d6d7ab7
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5d0ba30518
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@ -132,14 +132,14 @@ void Abc_SclTimeNtkPrint( SC_Man * p, int fShowAll, int fPrintPath )
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float maxDelay = Abc_SclObjTimePs(p, pPivot, fRise);
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p->ReportDelay = maxDelay;
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printf( "WireLoad model = \"%s\" ", p->pWLoadUsed ? p->pWLoadUsed->pName : "none" );
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printf( "Gates = %6d ", Abc_NtkNodeNum(p->pNtk) );
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printf( "Cave = %5.1f ", p->EstLoadAve );
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printf( "Min = %5.1f %% ", 100.0 * Abc_SclCountMinSize(p->pLib, p->pNtk, 0) / Abc_NtkNodeNum(p->pNtk) );
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printf( "Area = %12.2f ", Abc_SclGetTotalArea(p->pNtk) );
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printf( "Delay = %8.2f ps ", maxDelay );
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printf( "Min = %5.1f %% ", 100.0 * Abc_SclCountNearCriticalNodes(p) / Abc_NtkNodeNum(p->pNtk) );
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printf( " \n" );
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printf( "WireLoad model = \"%s\" ", p->pWLoadUsed ? p->pWLoadUsed->pName : "none" );
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printf( "Gates = %6d ", Abc_NtkNodeNum(p->pNtk) );
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printf( "Cave = %5.1f ff ", p->EstLoadAve );
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printf( "Area = %12.2f ", Abc_SclGetTotalArea(p->pNtk) );
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printf( "(%5.1f %%) ", 100.0 * Abc_SclCountMinSize(p->pLib, p->pNtk, 0) / Abc_NtkNodeNum(p->pNtk) );
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printf( "Delay = %8.2f ps ", maxDelay );
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printf( "(%5.1f %%) ", 100.0 * Abc_SclCountNearCriticalNodes(p) / Abc_NtkNodeNum(p->pNtk) );
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printf( " \n" );
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if ( fShowAll )
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{
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// printf( "Timing information for all nodes: \n" );
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@ -453,9 +453,9 @@ int Abc_SclTimeIncUpdate( SC_Man * p )
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// Abc_SclTimeIncCheckLevel( p->pNtk );
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Abc_NtkForEachObjVec( p->vChanged, p->pNtk, pObj, i )
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{
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Abc_SclTimeIncAddFanins( p, pObj );
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if ( pObj->fMarkC )
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continue;
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Abc_SclTimeIncAddFanins( p, pObj );
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Abc_SclTimeIncAddNode( p, pObj );
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}
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Vec_IntClear( p->vChanged );
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@ -425,6 +425,8 @@ int Abc_SclFindBypasses( SC_Man * p, Vec_Int_t * vPathNodes, int Ratio, int Notc
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Vec_IntFree( vEvals );
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if ( Vec_QueSize(p->vNodeByGain) == 0 )
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return 0;
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if ( fVeryVerbose )
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printf( "\n" );
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// accept changes for that are half above the average and do not overlap
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Counter = 0;
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@ -500,9 +502,13 @@ int Abc_SclFindBypasses( SC_Man * p, Vec_Int_t * vPathNodes, int Ratio, int Notc
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Abc_NodeInvUpdateObjFanoutPolarity( pFanin, pFanout );
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// report
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if ( fVeryVerbose )
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printf( "Node %6d Redir fanout %6d to fanin %6d. Gain = %7.1f ps. Replacing gate %12s by gate %12s.\n",
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Abc_ObjId(pBuf), Abc_ObjId(pFanout), Abc_ObjId(pFanin),
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Vec_FltEntry(p->vNode2Gain, iNode), pCellOld->pName, pCellNew->pName );
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{
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printf( "Node %6d Redir fanout %6d to fanin %6d. Gain = %7.1f ps. ",
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Abc_ObjId(pBuf), Abc_ObjId(pFanout), Abc_ObjId(pFanin), Vec_FltEntry(p->vNode2Gain, iNode) );
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printf( "Gate %12s (%2d/%2d) -> %12s (%2d/%2d) \n",
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pCellOld->pName, pCellOld->Order, pCellOld->nGates,
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pCellNew->pName, pCellNew->Order, pCellNew->nGates );
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}
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/*
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// check if the node became useless
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if ( Abc_ObjFanoutNum(pBuf) == 0 )
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