UberDDR3/rtl
Angelo Jacobo fa5fcc2615
use a 4-bit counter plus a 4-bit mask for tracking delay in every bank
this is the optimized delay-tracking mechanism on which the 32-bit shift regs is replaced by a 4-bit counter plus a 4-bit mask. This uses lower resources but still able to track the delays and the exact slot number where the delay is already satisfied (hence no added latency)
2023-03-30 18:17:46 +08:00
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ddr3_controller.v use a 4-bit counter plus a 4-bit mask for tracking delay in every bank 2023-03-30 18:17:46 +08:00