Angelo Jacobo fa3f5e0d65 use 32-bit shift reg for tracking delay inside every bank ... There are 4 delays being tracked (delay_before_precharge, delay_before_activate, delay_before_read, and delay_before_write) and 8 banks, that means 32x4x8 = 1024 bits needed for this tracking delay mechanism (totally wasteful!)		2023-03-30 18:14:09 +08:00
..
ddr3_controller.v	use 32-bit shift reg for tracking delay inside every bank	2023-03-30 18:14:09 +08:00