AngeloJacobo 1db41ad9e1 add xdc for microblaze run, and minor fixes in params		2025-02-22 11:23:24 +08:00
..
axi	update UberDDR3 AXI for Vivado custom IP	2025-02-16 14:53:05 +08:00
ecc	Revert "add self-refresh option, passing Simulation, ongoing formal"	2024-11-23 11:43:05 +08:00
spd	added simulation and project demo with XADC	2025-01-12 14:55:43 +08:00
ddr3_controller.v	add support for BIST_MODE = 0,1,and 2 , write data is also randomized	2025-02-09 09:48:46 +08:00
ddr3_phy.v	changed SKIP_INTERNAL_TEST to BIST_MODE (0,1, or 2)	2025-02-09 09:45:30 +08:00
ddr3_top.v	add xdc for microblaze run, and minor fixes in params	2025-02-22 11:23:24 +08:00