UberDDR3/example_demo/arty_s7
AngeloJacobo a3efc861da update bistream files from latest CI run 2025-06-05 18:55:44 +08:00
..
Makefile added vivado on makefile (make vivado) 2025-05-12 16:02:38 +08:00
arty_ddr3.v removed UART in example demo for arty s7 to pass openxc7 timing 2025-05-24 17:31:13 +08:00
arty_ddr3.xdc fix flagged errors from openxc7 2025-03-02 14:34:59 +08:00
arty_ddr3_openxc7.bit update bistream files from latest CI run 2025-06-05 18:55:44 +08:00
arty_ddr3_vivado.xdc added vivado on makefile (make vivado) 2025-05-12 16:02:38 +08:00
clk_wiz.v added vivado on makefile (make vivado) 2025-05-12 16:02:38 +08:00
uart_rx.v add makefile for openxc7 run (WORKING) 2024-10-13 16:45:06 +08:00
uart_tx.v add makefile for openxc7 run (WORKING) 2024-10-13 16:45:06 +08:00