update wcfg
This commit is contained in:
AngeloJacobo
parent
c97e5a8c1f
commit
ef8b1b84fc
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@ -11,15 +11,15 @@
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</db_ref>
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</db_ref_list>
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<zoom_setting>
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<ZoomStartTime time="66,520.100 ns"></ZoomStartTime>
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<ZoomEndTime time="66,575.001 ns"></ZoomEndTime>
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<Cursor1Time time="66,557.800 ns"></Cursor1Time>
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<ZoomStartTime time="128,330.484 ns"></ZoomStartTime>
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<ZoomEndTime time="128,385.185 ns"></ZoomEndTime>
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<Cursor1Time time="128,350.600 ns"></Cursor1Time>
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</zoom_setting>
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<column_width_setting>
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<NameColumnWidth column_width="258"></NameColumnWidth>
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<ValueColumnWidth column_width="141"></ValueColumnWidth>
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<ValueColumnWidth column_width="121"></ValueColumnWidth>
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</column_width_setting>
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<WVObjectSize size="128" />
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<WVObjectSize size="159" />
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<wave_markers>
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<marker label="" time="78646475" />
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<marker label="" time="66286475" />
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@ -35,6 +35,14 @@
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<obj_property name="label">Model File</obj_property>
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<obj_property name="DisplayName">label</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/i_clk">
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<obj_property name="ElementShortName">i_clk</obj_property>
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<obj_property name="ObjectShortName">i_clk</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/clk_locked">
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<obj_property name="ElementShortName">clk_locked</obj_property>
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<obj_property name="ObjectShortName">clk_locked</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/i_controller_clk">
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<obj_property name="ElementShortName">i_controller_clk</obj_property>
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<obj_property name="ObjectShortName">i_controller_clk</obj_property>
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@ -43,6 +51,10 @@
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<obj_property name="ElementShortName">i_ddr3_clk</obj_property>
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<obj_property name="ObjectShortName">i_ddr3_clk</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/i_ddr3_clk_90">
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<obj_property name="ElementShortName">i_ddr3_clk_90</obj_property>
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<obj_property name="ObjectShortName">i_ddr3_clk_90</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/i_ref_clk">
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<obj_property name="ElementShortName">i_ref_clk</obj_property>
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<obj_property name="ObjectShortName">i_ref_clk</obj_property>
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@ -73,30 +85,39 @@
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<obj_property name="ElementShortName">o_wb_ack</obj_property>
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<obj_property name="ObjectShortName">o_wb_ack</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/i_wb_sel">
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<obj_property name="ElementShortName">i_wb_sel[15:0]</obj_property>
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<obj_property name="ObjectShortName">i_wb_sel[15:0]</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/o_ddr3_dm">
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<obj_property name="ElementShortName">o_ddr3_dm[1:0]</obj_property>
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<obj_property name="ObjectShortName">o_ddr3_dm[1:0]</obj_property>
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<obj_property name="isExpanded"></obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/i_wb_we">
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<obj_property name="ElementShortName">i_wb_we</obj_property>
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<obj_property name="ObjectShortName">i_wb_we</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/i_wb_addr">
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<obj_property name="ElementShortName">i_wb_addr[23:0]</obj_property>
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<obj_property name="ObjectShortName">i_wb_addr[23:0]</obj_property>
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<obj_property name="ElementShortName">i_wb_addr[25:0]</obj_property>
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<obj_property name="ObjectShortName">i_wb_addr[25:0]</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/i_wb_data">
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<obj_property name="ElementShortName">i_wb_data[511:0]</obj_property>
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<obj_property name="ObjectShortName">i_wb_data[511:0]</obj_property>
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<obj_property name="ElementShortName">i_wb_data[127:0]</obj_property>
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<obj_property name="ObjectShortName">i_wb_data[127:0]</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/o_wb_stall">
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<obj_property name="ElementShortName">o_wb_stall</obj_property>
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<obj_property name="ObjectShortName">o_wb_stall</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/o_wb_data">
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<obj_property name="ElementShortName">o_wb_data[511:0]</obj_property>
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<obj_property name="ObjectShortName">o_wb_data[511:0]</obj_property>
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<obj_property name="ElementShortName">o_wb_data[127:0]</obj_property>
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<obj_property name="ObjectShortName">o_wb_data[127:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/o_wb_data_q">
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<obj_property name="ElementShortName">o_wb_data_q[1:0][511:0]</obj_property>
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<obj_property name="ObjectShortName">o_wb_data_q[1:0][511:0]</obj_property>
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<obj_property name="ElementShortName">o_wb_data_q[1:0][127:0]</obj_property>
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<obj_property name="ObjectShortName">o_wb_data_q[1:0][127:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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<obj_property name="isExpanded"></obj_property>
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</wvobject>
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@ -118,6 +139,7 @@
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/cs_n">
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<obj_property name="ElementShortName">cs_n[1:0]</obj_property>
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<obj_property name="ObjectShortName">cs_n[1:0]</obj_property>
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<obj_property name="isExpanded"></obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ras_n">
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<obj_property name="ElementShortName">ras_n</obj_property>
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@ -136,8 +158,8 @@
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<obj_property name="ObjectShortName">reset_n</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/addr">
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<obj_property name="ElementShortName">addr[13:0]</obj_property>
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<obj_property name="ObjectShortName">addr[13:0]</obj_property>
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<obj_property name="ElementShortName">addr[15:0]</obj_property>
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<obj_property name="ObjectShortName">addr[15:0]</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ba_addr">
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<obj_property name="ElementShortName">ba_addr[2:0]</obj_property>
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@ -145,8 +167,13 @@
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<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/dq">
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<obj_property name="ElementShortName">dq[63:0]</obj_property>
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<obj_property name="ObjectShortName">dq[63:0]</obj_property>
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<obj_property name="ElementShortName">dq[15:0]</obj_property>
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<obj_property name="ObjectShortName">dq[15:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_0/dq">
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<obj_property name="ElementShortName">dq[15:0]</obj_property>
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<obj_property name="ObjectShortName">dq[15:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/i_controller_clk">
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@ -157,22 +184,30 @@
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<obj_property name="ElementShortName">i_ddr3_clk</obj_property>
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<obj_property name="ObjectShortName">i_ddr3_clk</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/i_ddr3_clk_90">
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<obj_property name="ElementShortName">i_ddr3_clk_90</obj_property>
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<obj_property name="ObjectShortName">i_ddr3_clk_90</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/dqs">
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<obj_property name="ElementShortName">dqs[7:0]</obj_property>
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<obj_property name="ObjectShortName">dqs[7:0]</obj_property>
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<obj_property name="ElementShortName">dqs[1:0]</obj_property>
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<obj_property name="ObjectShortName">dqs[1:0]</obj_property>
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<obj_property name="isExpanded"></obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/dqs_n">
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<obj_property name="ElementShortName">dqs_n[7:0]</obj_property>
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<obj_property name="ObjectShortName">dqs_n[7:0]</obj_property>
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<obj_property name="ElementShortName">dqs_n[1:0]</obj_property>
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<obj_property name="ObjectShortName">dqs_n[1:0]</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/o_ddr3_clk_p">
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<obj_property name="ElementShortName">o_ddr3_clk_p</obj_property>
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<obj_property name="ObjectShortName">o_ddr3_clk_p</obj_property>
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<obj_property name="CustomSignalColor">#FF00FF</obj_property>
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<obj_property name="UseCustomSignalColor">true</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/o_ddr3_clk_n">
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<obj_property name="ElementShortName">o_ddr3_clk_n</obj_property>
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<obj_property name="ObjectShortName">o_ddr3_clk_n</obj_property>
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<obj_property name="CustomSignalColor">#FF00FF</obj_property>
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<obj_property name="UseCustomSignalColor">true</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/instruction_address">
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<obj_property name="ElementShortName">instruction_address[4:0]</obj_property>
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@ -187,6 +222,33 @@
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<obj_property name="ElementShortName">stage2_pending</obj_property>
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<obj_property name="ObjectShortName">stage2_pending</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/read_data_store">
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<obj_property name="ElementShortName">read_data_store[127:0]</obj_property>
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<obj_property name="ObjectShortName">read_data_store[127:0]</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/o_wb_data">
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<obj_property name="ElementShortName">o_wb_data[127:0]</obj_property>
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<obj_property name="ObjectShortName">o_wb_data[127:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/i_controller_data">
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<obj_property name="ElementShortName">i_controller_data[127:0]</obj_property>
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<obj_property name="ObjectShortName">i_controller_data[127:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/oserdes_data">
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<obj_property name="ElementShortName">oserdes_data[15:0]</obj_property>
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<obj_property name="ObjectShortName">oserdes_data[15:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/i_controller_toggle_dqs">
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<obj_property name="ElementShortName">i_controller_toggle_dqs</obj_property>
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<obj_property name="ObjectShortName">i_controller_toggle_dqs</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/toggle_dqs_q">
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<obj_property name="ElementShortName">toggle_dqs_q</obj_property>
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<obj_property name="ObjectShortName">toggle_dqs_q</obj_property>
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</wvobject>
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<wvobject fp_name="divider251" type="divider">
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<obj_property name="label">Bank Track</obj_property>
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<obj_property name="DisplayName">label</obj_property>
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@ -212,8 +274,8 @@
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<obj_property name="ObjectShortName">bank_status_q[7:0]</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/bank_active_row_q">
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<obj_property name="ElementShortName">bank_active_row_q[7:0][13:0]</obj_property>
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<obj_property name="ObjectShortName">bank_active_row_q[7:0][13:0]</obj_property>
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<obj_property name="ElementShortName">bank_active_row_q[7:0][15:0]</obj_property>
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<obj_property name="ObjectShortName">bank_active_row_q[7:0][15:0]</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/stage1_pending">
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<obj_property name="ElementShortName">stage1_pending</obj_property>
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@ -264,8 +326,8 @@
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<obj_property name="ObjectShortName">stage1_next_bank[2:0]</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/stage1_next_row">
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<obj_property name="ElementShortName">stage1_next_row[13:0]</obj_property>
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<obj_property name="ObjectShortName">stage1_next_row[13:0]</obj_property>
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<obj_property name="ElementShortName">stage1_next_row[15:0]</obj_property>
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<obj_property name="ObjectShortName">stage1_next_row[15:0]</obj_property>
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</wvobject>
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<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/stage1_stall">
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<obj_property name="ElementShortName">stage1_stall</obj_property>
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@ -300,8 +362,8 @@
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<obj_property name="ObjectShortName">state_calibrate[4:0]</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/lane">
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<obj_property name="ElementShortName">lane[2:0]</obj_property>
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<obj_property name="ObjectShortName">lane[2:0]</obj_property>
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<obj_property name="ElementShortName">lane[0:0]</obj_property>
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<obj_property name="ObjectShortName">lane[0:0]</obj_property>
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<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/instruction_address">
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@ -325,6 +387,7 @@
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/dq_target_index">
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<obj_property name="ElementShortName">dq_target_index[5:0]</obj_property>
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<obj_property name="ObjectShortName">dq_target_index[5:0]</obj_property>
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<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/dqs_target_index_orig">
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<obj_property name="ElementShortName">dqs_target_index_orig[5:0]</obj_property>
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@ -335,43 +398,241 @@
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<obj_property name="ObjectShortName">dqs_start_index_repeat[0:0]</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_data">
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<obj_property name="ElementShortName">i_phy_iserdes_data[511:0]</obj_property>
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<obj_property name="ObjectShortName">i_phy_iserdes_data[511:0]</obj_property>
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<obj_property name="ElementShortName">i_phy_iserdes_data[127:0]</obj_property>
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<obj_property name="ObjectShortName">i_phy_iserdes_data[127:0]</obj_property>
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<obj_property name="Radix">HEXRADIX</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/data_start_index">
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<obj_property name="ElementShortName">data_start_index[1:0][6:0]</obj_property>
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<obj_property name="ObjectShortName">data_start_index[1:0][6:0]</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs">
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<obj_property name="ElementShortName">i_phy_iserdes_dqs[63:0]</obj_property>
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<obj_property name="ObjectShortName">i_phy_iserdes_dqs[63:0]</obj_property>
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<obj_property name="ElementShortName">i_phy_iserdes_dqs[15:0]</obj_property>
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<obj_property name="ObjectShortName">i_phy_iserdes_dqs[15:0]</obj_property>
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<obj_property name="Radix">BINARYRADIX</obj_property>
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</wvobject>
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<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs">
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<obj_property name="ElementShortName">i_phy_iserdes_dqs[15:0]</obj_property>
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<obj_property name="ObjectShortName">i_phy_iserdes_dqs[15:0]</obj_property>
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<obj_property name="Radix">BINARYRADIX</obj_property>
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</wvobject>
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<wvobject type="vbus" fp_name="vbus181">
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<obj_property name="label">i_phy_iserdes_dqs_lane1</obj_property>
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<obj_property name="DisplayName">label</obj_property>
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<obj_property name="Radix">BINARYRADIX</obj_property>
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<obj_property name="CustomSignalColor">#FF00FF</obj_property>
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<obj_property name="UseCustomSignalColor">true</obj_property>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[15]">
|
||||
<obj_property name="ElementShortName">[15]</obj_property>
|
||||
<obj_property name="ObjectShortName">[15]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[14]">
|
||||
<obj_property name="ElementShortName">[14]</obj_property>
|
||||
<obj_property name="ObjectShortName">[14]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[13]">
|
||||
<obj_property name="ElementShortName">[13]</obj_property>
|
||||
<obj_property name="ObjectShortName">[13]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[12]">
|
||||
<obj_property name="ElementShortName">[12]</obj_property>
|
||||
<obj_property name="ObjectShortName">[12]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[11]">
|
||||
<obj_property name="ElementShortName">[11]</obj_property>
|
||||
<obj_property name="ObjectShortName">[11]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[10]">
|
||||
<obj_property name="ElementShortName">[10]</obj_property>
|
||||
<obj_property name="ObjectShortName">[10]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[9]">
|
||||
<obj_property name="ElementShortName">[9]</obj_property>
|
||||
<obj_property name="ObjectShortName">[9]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[8]">
|
||||
<obj_property name="ElementShortName">[8]</obj_property>
|
||||
<obj_property name="ObjectShortName">[8]</obj_property>
|
||||
</wvobject>
|
||||
</wvobject>
|
||||
<wvobject type="vbus" fp_name="vbus172">
|
||||
<obj_property name="label">i_phy_iserdes_dqs_lane0</obj_property>
|
||||
<obj_property name="DisplayName">label</obj_property>
|
||||
<obj_property name="Radix">BINARYRADIX</obj_property>
|
||||
<obj_property name="CustomSignalColor">#FF00FF</obj_property>
|
||||
<obj_property name="UseCustomSignalColor">true</obj_property>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[7]">
|
||||
<obj_property name="ElementShortName">[7]</obj_property>
|
||||
<obj_property name="ObjectShortName">[7]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[6]">
|
||||
<obj_property name="ElementShortName">[6]</obj_property>
|
||||
<obj_property name="ObjectShortName">[6]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[5]">
|
||||
<obj_property name="ElementShortName">[5]</obj_property>
|
||||
<obj_property name="ObjectShortName">[5]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[4]">
|
||||
<obj_property name="ElementShortName">[4]</obj_property>
|
||||
<obj_property name="ObjectShortName">[4]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[3]">
|
||||
<obj_property name="ElementShortName">[3]</obj_property>
|
||||
<obj_property name="ObjectShortName">[3]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[2]">
|
||||
<obj_property name="ElementShortName">[2]</obj_property>
|
||||
<obj_property name="ObjectShortName">[2]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[1]">
|
||||
<obj_property name="ElementShortName">[1]</obj_property>
|
||||
<obj_property name="ObjectShortName">[1]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs[0]">
|
||||
<obj_property name="ElementShortName">[0]</obj_property>
|
||||
<obj_property name="ObjectShortName">[0]</obj_property>
|
||||
</wvobject>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference">
|
||||
<obj_property name="ElementShortName">i_phy_iserdes_bitslip_reference[63:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">i_phy_iserdes_bitslip_reference[63:0]</obj_property>
|
||||
<obj_property name="ElementShortName">i_phy_iserdes_bitslip_reference[15:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">i_phy_iserdes_bitslip_reference[15:0]</obj_property>
|
||||
<obj_property name="Radix">BINARYRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_idelayctrl_rdy">
|
||||
<obj_property name="ElementShortName">i_phy_idelayctrl_rdy</obj_property>
|
||||
<obj_property name="ObjectShortName">i_phy_idelayctrl_rdy</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/idelay_dqs">
|
||||
<obj_property name="ElementShortName">idelay_dqs[7:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">idelay_dqs[7:0]</obj_property>
|
||||
<obj_property name="ElementShortName">idelay_dqs[1:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">idelay_dqs[1:0]</obj_property>
|
||||
<obj_property name="isExpanded"></obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/i_controller_clk">
|
||||
<obj_property name="ElementShortName">i_controller_clk</obj_property>
|
||||
<obj_property name="ObjectShortName">i_controller_clk</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/i_ddr3_clk">
|
||||
<obj_property name="ElementShortName">i_ddr3_clk</obj_property>
|
||||
<obj_property name="ObjectShortName">i_ddr3_clk</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/idelay_data">
|
||||
<obj_property name="ElementShortName">idelay_data[63:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">idelay_data[63:0]</obj_property>
|
||||
<obj_property name="ElementShortName">idelay_data[15:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">idelay_data[15:0]</obj_property>
|
||||
<obj_property name="Radix">HEXRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/odelay_data">
|
||||
<obj_property name="ElementShortName">odelay_data[63:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">odelay_data[63:0]</obj_property>
|
||||
<obj_property name="ElementShortName">odelay_data[15:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">odelay_data[15:0]</obj_property>
|
||||
<obj_property name="Radix">ASCIIRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/odelay_dqs">
|
||||
<obj_property name="ElementShortName">odelay_dqs[7:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">odelay_dqs[7:0]</obj_property>
|
||||
<obj_property name="ElementShortName">odelay_dqs[1:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">odelay_dqs[1:0]</obj_property>
|
||||
<obj_property name="Radix">HEXRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/i_controller_bitslip">
|
||||
<obj_property name="ElementShortName">i_controller_bitslip[1:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">i_controller_bitslip[1:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/o_controller_iserdes_dqs">
|
||||
<obj_property name="ElementShortName">o_controller_iserdes_dqs[15:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">o_controller_iserdes_dqs[15:0]</obj_property>
|
||||
<obj_property name="Radix">BINARYRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs">
|
||||
<obj_property name="ElementShortName">i_phy_iserdes_dqs[15:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">i_phy_iserdes_dqs[15:0]</obj_property>
|
||||
<obj_property name="Radix">BINARYRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/train_delay">
|
||||
<obj_property name="ElementShortName">train_delay[1:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">train_delay[1:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference">
|
||||
<obj_property name="ElementShortName">i_phy_iserdes_bitslip_reference[15:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">i_phy_iserdes_bitslip_reference[15:0]</obj_property>
|
||||
<obj_property name="Radix">BINARYRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="vbus" fp_name="vbus245">
|
||||
<obj_property name="label">i_phy_iserdes_bitref_lane1</obj_property>
|
||||
<obj_property name="DisplayName">label</obj_property>
|
||||
<obj_property name="Radix">BINARYRADIX</obj_property>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[15]">
|
||||
<obj_property name="ElementShortName">[15]</obj_property>
|
||||
<obj_property name="ObjectShortName">[15]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[14]">
|
||||
<obj_property name="ElementShortName">[14]</obj_property>
|
||||
<obj_property name="ObjectShortName">[14]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[13]">
|
||||
<obj_property name="ElementShortName">[13]</obj_property>
|
||||
<obj_property name="ObjectShortName">[13]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[12]">
|
||||
<obj_property name="ElementShortName">[12]</obj_property>
|
||||
<obj_property name="ObjectShortName">[12]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[11]">
|
||||
<obj_property name="ElementShortName">[11]</obj_property>
|
||||
<obj_property name="ObjectShortName">[11]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[10]">
|
||||
<obj_property name="ElementShortName">[10]</obj_property>
|
||||
<obj_property name="ObjectShortName">[10]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[9]">
|
||||
<obj_property name="ElementShortName">[9]</obj_property>
|
||||
<obj_property name="ObjectShortName">[9]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[8]">
|
||||
<obj_property name="ElementShortName">[8]</obj_property>
|
||||
<obj_property name="ObjectShortName">[8]</obj_property>
|
||||
</wvobject>
|
||||
</wvobject>
|
||||
<wvobject type="vbus" fp_name="vbus236">
|
||||
<obj_property name="label">i_phy_iserdes_bitref_lane0</obj_property>
|
||||
<obj_property name="DisplayName">label</obj_property>
|
||||
<obj_property name="Radix">BINARYRADIX</obj_property>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[7]">
|
||||
<obj_property name="ElementShortName">[7]</obj_property>
|
||||
<obj_property name="ObjectShortName">[7]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[6]">
|
||||
<obj_property name="ElementShortName">[6]</obj_property>
|
||||
<obj_property name="ObjectShortName">[6]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[5]">
|
||||
<obj_property name="ElementShortName">[5]</obj_property>
|
||||
<obj_property name="ObjectShortName">[5]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[4]">
|
||||
<obj_property name="ElementShortName">[4]</obj_property>
|
||||
<obj_property name="ObjectShortName">[4]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[3]">
|
||||
<obj_property name="ElementShortName">[3]</obj_property>
|
||||
<obj_property name="ObjectShortName">[3]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[2]">
|
||||
<obj_property name="ElementShortName">[2]</obj_property>
|
||||
<obj_property name="ObjectShortName">[2]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[1]">
|
||||
<obj_property name="ElementShortName">[1]</obj_property>
|
||||
<obj_property name="ObjectShortName">[1]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference[0]">
|
||||
<obj_property name="ElementShortName">[0]</obj_property>
|
||||
<obj_property name="ObjectShortName">[0]</obj_property>
|
||||
</wvobject>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/i_controller_bitslip">
|
||||
<obj_property name="ElementShortName">i_controller_bitslip[1:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">i_controller_bitslip[1:0]</obj_property>
|
||||
<obj_property name="isExpanded"></obj_property>
|
||||
</wvobject>
|
||||
<wvobject fp_name="divider136" type="divider">
|
||||
<obj_property name="label">CMD</obj_property>
|
||||
<obj_property name="DisplayName">label</obj_property>
|
||||
|
|
@ -385,8 +646,8 @@
|
|||
<obj_property name="ObjectShortName">i_ddr3_clk</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/cmd_d">
|
||||
<obj_property name="ElementShortName">cmd_d[3:0][23:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">cmd_d[3:0][23:0]</obj_property>
|
||||
<obj_property name="ElementShortName">cmd_d[3:0][25:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">cmd_d[3:0][25:0]</obj_property>
|
||||
<obj_property name="isExpanded"></obj_property>
|
||||
<obj_property name="Radix">BINARYRADIX</obj_property>
|
||||
</wvobject>
|
||||
|
|
@ -425,12 +686,12 @@
|
|||
<obj_property name="UseCustomSignalColor">true</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/oserdes_dqs">
|
||||
<obj_property name="ElementShortName">oserdes_dqs[7:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">oserdes_dqs[7:0]</obj_property>
|
||||
<obj_property name="ElementShortName">oserdes_dqs[1:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">oserdes_dqs[1:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_phy_inst/odelay_dqs">
|
||||
<obj_property name="ElementShortName">odelay_dqs[7:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">odelay_dqs[7:0]</obj_property>
|
||||
<obj_property name="ElementShortName">odelay_dqs[1:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">odelay_dqs[1:0]</obj_property>
|
||||
<obj_property name="Radix">HEXRADIX</obj_property>
|
||||
<obj_property name="isExpanded"></obj_property>
|
||||
</wvobject>
|
||||
|
|
@ -456,6 +717,7 @@
|
|||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/idelay_data_cntvaluein_prev">
|
||||
<obj_property name="ElementShortName">idelay_data_cntvaluein_prev[4:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">idelay_data_cntvaluein_prev[4:0]</obj_property>
|
||||
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/o_phy_idelay_dqs_cntvaluein">
|
||||
<obj_property name="ElementShortName">o_phy_idelay_dqs_cntvaluein[4:0]</obj_property>
|
||||
|
|
@ -463,30 +725,46 @@
|
|||
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/o_phy_odelay_data_ld">
|
||||
<obj_property name="ElementShortName">o_phy_odelay_data_ld[7:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">o_phy_odelay_data_ld[7:0]</obj_property>
|
||||
<obj_property name="ElementShortName">o_phy_odelay_data_ld[1:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">o_phy_odelay_data_ld[1:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/o_phy_odelay_dqs_ld">
|
||||
<obj_property name="ElementShortName">o_phy_odelay_dqs_ld[7:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">o_phy_odelay_dqs_ld[7:0]</obj_property>
|
||||
<obj_property name="ElementShortName">o_phy_odelay_dqs_ld[1:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">o_phy_odelay_dqs_ld[1:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/o_phy_idelay_data_ld">
|
||||
<obj_property name="ElementShortName">o_phy_idelay_data_ld[7:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">o_phy_idelay_data_ld[7:0]</obj_property>
|
||||
<obj_property name="ElementShortName">o_phy_idelay_data_ld[1:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">o_phy_idelay_data_ld[1:0]</obj_property>
|
||||
<obj_property name="isExpanded"></obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/o_phy_idelay_dqs_ld">
|
||||
<obj_property name="ElementShortName">o_phy_idelay_dqs_ld[7:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">o_phy_idelay_dqs_ld[7:0]</obj_property>
|
||||
<obj_property name="ElementShortName">o_phy_idelay_dqs_ld[1:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">o_phy_idelay_dqs_ld[1:0]</obj_property>
|
||||
<obj_property name="isExpanded"></obj_property>
|
||||
</wvobject>
|
||||
<wvobject fp_name="divider150" type="divider">
|
||||
<obj_property name="label">WB2 Registers</obj_property>
|
||||
<obj_property name="DisplayName">label</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/dqs_target_index">
|
||||
<obj_property name="ElementShortName">dqs_target_index[5:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">dqs_target_index[5:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/dqs_target_index_orig">
|
||||
<obj_property name="ElementShortName">dqs_target_index_orig[5:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">dqs_target_index_orig[5:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/dq_target_index">
|
||||
<obj_property name="ElementShortName">dq_target_index[5:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">dq_target_index[5:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/dqs_target_index_value">
|
||||
<obj_property name="ElementShortName">dqs_target_index_value[5:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">dqs_target_index_value[5:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_dqs">
|
||||
<obj_property name="ElementShortName">i_phy_iserdes_dqs[63:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">i_phy_iserdes_dqs[63:0]</obj_property>
|
||||
<obj_property name="ElementShortName">i_phy_iserdes_dqs[15:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">i_phy_iserdes_dqs[15:0]</obj_property>
|
||||
<obj_property name="Radix">BINARYRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="logic" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/o_phy_dq_tri_control">
|
||||
|
|
@ -514,44 +792,46 @@
|
|||
<obj_property name="ObjectShortName">added_read_pipe_max[3:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/added_read_pipe">
|
||||
<obj_property name="ElementShortName">added_read_pipe[7:0][3:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">added_read_pipe[7:0][3:0]</obj_property>
|
||||
<obj_property name="ElementShortName">added_read_pipe[1:0][3:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">added_read_pipe[1:0][3:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/dqs_store">
|
||||
<obj_property name="ElementShortName">dqs_store[39:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">dqs_store[39:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/i_phy_iserdes_bitslip_reference">
|
||||
<obj_property name="ElementShortName">i_phy_iserdes_bitslip_reference[63:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">i_phy_iserdes_bitslip_reference[63:0]</obj_property>
|
||||
<obj_property name="ElementShortName">i_phy_iserdes_bitslip_reference[15:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">i_phy_iserdes_bitslip_reference[15:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/read_data_store">
|
||||
<obj_property name="ElementShortName">read_data_store[511:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">read_data_store[511:0]</obj_property>
|
||||
<obj_property name="ElementShortName">read_data_store[127:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">read_data_store[127:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/write_pattern">
|
||||
<obj_property name="ElementShortName">write_pattern[127:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">write_pattern[127:0]</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/odelay_data_cntvaluein">
|
||||
<obj_property name="ElementShortName">odelay_data_cntvaluein[7:0][4:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">odelay_data_cntvaluein[7:0][4:0]</obj_property>
|
||||
<obj_property name="ElementShortName">odelay_data_cntvaluein[1:0][4:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">odelay_data_cntvaluein[1:0][4:0]</obj_property>
|
||||
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/odelay_dqs_cntvaluein">
|
||||
<obj_property name="ElementShortName">odelay_dqs_cntvaluein[7:0][4:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">odelay_dqs_cntvaluein[7:0][4:0]</obj_property>
|
||||
<obj_property name="ElementShortName">odelay_dqs_cntvaluein[1:0][4:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">odelay_dqs_cntvaluein[1:0][4:0]</obj_property>
|
||||
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/idelay_data_cntvaluein">
|
||||
<obj_property name="ElementShortName">idelay_data_cntvaluein[7:0][4:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">idelay_data_cntvaluein[7:0][4:0]</obj_property>
|
||||
<obj_property name="ElementShortName">idelay_data_cntvaluein[1:0][4:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">idelay_data_cntvaluein[1:0][4:0]</obj_property>
|
||||
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
|
||||
<obj_property name="isExpanded"></obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/ddr3_top/ddr3_controller_inst/idelay_dqs_cntvaluein">
|
||||
<obj_property name="ElementShortName">idelay_dqs_cntvaluein[7:0][4:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">idelay_dqs_cntvaluein[7:0][4:0]</obj_property>
|
||||
<obj_property name="ElementShortName">idelay_dqs_cntvaluein[1:0][4:0]</obj_property>
|
||||
<obj_property name="ObjectShortName">idelay_dqs_cntvaluein[1:0][4:0]</obj_property>
|
||||
<obj_property name="Radix">UNSIGNEDDECRADIX</obj_property>
|
||||
<obj_property name="isExpanded"></obj_property>
|
||||
</wvobject>
|
||||
<wvobject type="array" fp_name="/ddr3_dimm_micron_sim/i_wb2_addr">
|
||||
<obj_property name="ElementShortName">i_wb2_addr[31:0]</obj_property>
|
||||
|
|
|
|||
Loading…
Reference in New Issue