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UberDDR3
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remove xadc define and uncomment INTERNAL_VREF to make this work in openxc7 (openxc7 still fails due to shiftout ports)

This commit is contained in:
AngeloJacobo 2025-03-09 10:57:43 +08:00
parent 42b42023dd
commit 47067f6903
2 changed files with 5 additions and 3 deletions
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4
example_demo/arty_s7/arty_ddr3.v
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@ -146,14 +146,14 @@
.uart_rx_data(rd_data) // The recieved data.
);
`define XADC
// `define XADC
`ifdef XADC
xadc_wiz_0 xadc_inst (
.dclk_in(i_controller_clk), // Clock input for the dynamic reconfiguration port
.user_temp_alarm_out(user_temp_alarm_out) // Temperature-sensor alarm output
);
`else
user_temp_alarm_out = 1'b0;
assign user_temp_alarm_out = 1'b0;
`endif
// UART module from https://github.com/alexforencich/verilog-uart (DOES NOT WORK ON OPENXC7, UberDDR3 cannot finish calibration when this UART is used)

4
example_demo/arty_s7/arty_ddr3.xdc
View File

@ -260,6 +260,8 @@ set_property CONFIG_MODE SPIx4 [current_design]
## be set to enable an internal VREF for BANK 34. Since a 1.35v supply is being
## used the internal reference is set to half that value (i.e. 0.675v). Note that
## this property must be set even if SW3 is not used in the design.
set_property INTERNAL_VREF 0.675 [get_iobanks 34]
## COMMENT THIS OUT IF RUNNING IN OPENXC7 (OTHERWISE UNCOMMENT THIS)
# set_property INTERNAL_VREF 0.675 [get_iobanks 34]