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OpenSTA/verilog
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James Cherry fdca0dff7a write_verilog use inout for power/ground 
Signed-off-by: James Cherry <cherry@parallaxsw.com>
 		2024-04-24 09:34:21 -07:00
..
Verilog.i update copyright 2024-01-11 16:34:49 -08:00
Verilog.tcl update copyright 2024-01-11 16:34:49 -08:00
VerilogLex.ll Initial Pass at Attribute parsing 2024-03-09 22:02:19 +00:00
VerilogParse.yy Fixes memory leak in verilog attribute code. 2024-04-22 21:54:12 +00:00
VerilogReader.cc Fixes memory leak in verilog attribute code. 2024-04-22 21:54:12 +00:00
VerilogReaderPvt.hh moving attribute types to std::string 2024-03-09 22:02:21 +00:00
VerilogWriter.cc write_verilog use inout for power/ground 2024-04-24 09:34:21 -07:00