OpenSTA/network
James Cherry 8287aec5f6 Verilog make pins for liberty pg_pins resolves #326
commit b4a89c93965c49a8685fd41cb6aee10635d7a7f3
Author: James Cherry <cherry@parallaxsw.com>
Date:   Fri Nov 7 11:48:10 2025 -0700

    pg_ -> PwrGnd

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 12ddba4bf220cec8459c15e483a871b13e507bf2
Author: James Cherry <cherry@parallaxsw.com>
Date:   Fri Nov 7 08:56:02 2025 -0700

    pg_port

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

Signed-off-by: James Cherry <cherry@parallaxsw.com>
2025-11-07 11:55:43 -07:00
..
ConcreteLibrary.cc liberty bundle ports apply func's to members resolves #256 2025-06-16 16:45:21 +02:00
ConcreteNetwork.cc Network::attributeMap resolves #245 2025-05-18 09:37:10 -07:00
HpinDrvrLoad.cc update copyright 2025-01-21 18:54:33 -07:00
Link.tcl update copyright 2025-01-21 18:54:33 -07:00
Network.cc set_min/max_delay -from reg/D startpoint warning resolves #265 2025-07-03 17:08:44 -07:00
Network.i Verilog make pins for liberty pg_pins resolves #326 2025-11-07 11:55:43 -07:00
Network.tcl liberty bundle ports apply func's to members resolves #256 2025-06-16 16:45:21 +02:00
NetworkCmp.cc update copyright 2025-01-21 18:54:33 -07:00
NetworkEdit.i update copyright 2025-01-21 18:54:33 -07:00
NetworkEdit.tcl update copyright 2025-01-21 18:54:33 -07:00
ParseBus.cc update copyright 2025-01-21 18:54:33 -07:00
PortDirection.cc update copyright 2025-01-21 18:54:33 -07:00
SdcNetwork.cc spef support net missing divider escape resolves #311 2025-10-14 15:58:48 -07:00
VerilogNamespace.cc remove using std from headers 2025-04-11 16:59:48 -07:00