OpenSTA/sdc
Jaehyun Kim a5f8e9c3ab test: Fix test failures after master merge
Update test code to match API changes from upstream master:

- TestGraph.cc: Fix makeScenes() call to pass reference instead of pointer
- TestLibertyClasses.cc: Fix ScaleFactorType wire_res/wire_cap name mapping;
  fix TablePtr usage by calling .get() where const TableModel* is expected
- TestLibertyClasses.cc: Update liberty_read_nangate.ok for new timing arc output
- TestPower.cc: Replace PwrActivityOrigin::defaulted with ::unknown;
  fix isSet() expectations (unknown origin returns false)
- TestSdcClasses.cc, TestSdf.cc, TestUtil.cc, TestSpice.cc:
  Fix RiseFall::to_string() expected values from short form ("^"/"v")
  to long form ("rise"/"fall")
- TestUtil.cc: Remove tests for deleted StringVector/split/TokenParser
  and StringSet::deleteContents (removed from master)
- TestSpice.cc: Replace StdStringSeq with StringSeq
- helpers.tcl: Use pwd-based result_dir so module tests write results
  to their own test/results/ directory
- verilog_bus.ok: Update golden file for new port ordering from master

Signed-off-by: Jaehyun Kim <jhkim@precisioninno.com>
2026-03-11 10:16:27 +09:00
..
test test: Fix test failures after master merge 2026-03-11 10:16:27 +09:00
Clock.cc RiseFall use shortName instead of to_string 2026-03-06 12:02:05 -07:00
ClockGatingCheck.cc update copyright 2025-01-21 18:54:33 -07:00
ClockGroups.cc rel 3.0 2026-01-13 09:36:45 -07:00
ClockInsertion.cc rel 3.0 2026-01-13 09:36:45 -07:00
ClockLatency.cc rel 3.0 2026-01-13 09:36:45 -07:00
CycleAccting.cc rel 3.0 2026-01-13 09:36:45 -07:00
DataCheck.cc rel 3.0 2026-01-13 09:36:45 -07:00
DeratingFactors.cc rel 3.0 2026-01-13 09:36:45 -07:00
DisabledPorts.cc LibertyPortPair calls 2026-03-08 13:36:54 -07:00
ExceptionPath.cc PinPair 2026-03-08 14:27:56 -07:00
InputDrive.cc rel 3.0 2026-01-13 09:36:45 -07:00
PinPair.cc rel 3.0 2026-01-13 09:36:45 -07:00
PortDelay.cc rel 3.0 2026-01-13 09:36:45 -07:00
PortExtCap.cc rel 3.0 2026-01-13 09:36:45 -07:00
Sdc.cc PinPair 2026-03-08 14:27:56 -07:00
Sdc.i StdStringSeq -> StringSeq 2026-03-08 15:51:50 -07:00
Sdc.tcl Merge branch 'master' into rel_3.0 2026-01-23 12:40:57 -07:00
SdcCmdComment.cc update copyright 2025-01-21 18:54:33 -07:00
Variables.cc rel 3.0 2026-01-13 09:36:45 -07:00
WriteSdc.cc rm using std:: 2026-03-02 12:13:13 -08:00
WriteSdc.hh include/sta/WriteSdc.hh -> sdc/WriteSdc.hh 2026-03-08 14:27:49 -07:00
WriteSdcPvt.hh rel 3.0 2026-01-13 09:36:45 -07:00