OpenSTA/verilog
Ethan Mahintorabi 8a46208c4d
Fixes constant integer verilog parsing
Fixes parsing attributes of the form

```systemverilog
  (* bottom_bound = 1'sh0 *)
  sky130_fd_sc_hd__dfrtp_1 _1415_ (
    .CLK(clk),
    .D(in),
    .Q(out),
    .RESET_B(reset)
  );
```

In particular "supporting" the signed indicator.

Co-authored-by: Mike Inouye <mikeinouye@google.com>
Signed-off-by: Ethan Mahintorabi <ethanmoon@google.com>
2024-10-08 20:40:07 +00:00
..
Verilog.i mv copyright to top in swig files 2024-07-24 09:04:08 -07:00
Verilog.tcl update copyright 2024-01-11 16:34:49 -08:00
VerilogLex.ll Fixes constant integer verilog parsing 2024-10-08 20:40:07 +00:00
VerilogParse.yy Fixes memory leak in verilog attribute code. 2024-04-22 21:54:12 +00:00
VerilogReader.cc rel 2.6.0 2024-07-24 09:04:08 -07:00
VerilogReaderPvt.hh moving attribute types to std::string 2024-03-09 22:02:21 +00:00
VerilogWriter.cc rel 2.6.0 2024-07-24 09:04:08 -07:00