mv copyright to top in swig files
Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
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@ -1,7 +1,3 @@
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%module dcalc
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%{
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// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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@ -18,6 +14,9 @@
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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%module dcalc
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%{
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#include "Sta.hh"
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#include "ArcDelayCalc.hh"
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#include "dcalc/ArcDcalcWaveforms.hh"
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@ -1,7 +1,3 @@
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%module liberty
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%{
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// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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@ -18,6 +14,9 @@
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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%module liberty
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%{
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#include "Liberty.hh"
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#include "EquivCells.hh"
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#include "LibertyWriter.hh"
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@ -1,7 +1,3 @@
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%module parasitics
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%{
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// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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@ -18,6 +14,9 @@
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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%module parasitics
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%{
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#include "Sta.hh"
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using sta::Sta;
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@ -1,7 +1,3 @@
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%module power
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%{
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// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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@ -18,6 +14,9 @@
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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%module power
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%{
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#include "Sta.hh"
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#include "power/Power.hh"
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#include "power/VcdReader.hh"
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@ -1,7 +1,3 @@
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%module sdc
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%{
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// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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@ -18,6 +14,9 @@
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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%module sdc
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%{
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#include "Sdc.hh"
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#include "Clock.hh"
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#include "PortDelay.hh"
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@ -1279,4 +1278,3 @@ Clock *clock() { return self->clock(); }
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RiseFall *transition() { return self->transition(); }
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float time() { return self->time(); }
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}
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@ -1,7 +1,3 @@
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%module sdf
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%{
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// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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@ -18,6 +14,9 @@
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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%module sdf
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%{
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#include "sdf/SdfReader.hh"
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#include "sdf/ReportAnnotation.hh"
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#include "sdf/SdfWriter.hh"
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%module NetworkEdit
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%{
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// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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@ -18,6 +14,9 @@
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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%module NetworkEdit
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%{
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using sta::Cell;
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using sta::Instance;
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using sta::Net;
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%module sta
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%{
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// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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@ -33,6 +29,9 @@
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//
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////////////////////////////////////////////////////////////////
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%module sta
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%{
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#include "Machine.hh"
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#include "StaConfig.hh" // STA_VERSION
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#include "Stats.hh"
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@ -1,3 +1,19 @@
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// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, either version 3 of the License, or
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// (at your option) any later version.
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//
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License for more details.
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//
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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// Swig TCL input/output type parsers.
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%{
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@ -1,7 +1,3 @@
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%module verilog
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%{
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// OpenSTA, Static Timing Analyzer
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// Copyright (c) 2024, Parallax Software, Inc.
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//
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@ -18,6 +14,9 @@
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// You should have received a copy of the GNU General Public License
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// along with this program. If not, see <https://www.gnu.org/licenses/>.
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%module verilog
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%{
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#include "VerilogReader.hh"
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#include "VerilogWriter.hh"
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#include "Sta.hh"
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