OpenSTA/network
Jaehyun Kim e5d8d8c970 test: Remove empty-body assertions and fix test issues from review feedback
Remove useless empty-body if-blocks that check file size/existence without
doing anything, replacing them with meaningful puts output where appropriate.
Split monolithic verilog test files into individual per-test files with
their own .ok golden files. Update .ok files to match actual output.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Signed-off-by: Jaehyun Kim <jhkim@precisioninno.com>
2026-02-22 18:52:36 +09:00
..
test test: Remove empty-body assertions and fix test issues from review feedback 2026-02-22 18:52:36 +09:00
ConcreteLibrary.cc liberty bundle ports apply func's to members resolves #256 2025-06-16 16:45:21 +02:00
ConcreteNetwork.cc replace_cell w/spef memory issue 2025-12-02 14:29:55 -08:00
HpinDrvrLoad.cc update copyright 2025-01-21 18:54:33 -07:00
Link.tcl update copyright 2025-01-21 18:54:33 -07:00
Network.cc set_min/max_delay -from reg/D startpoint warning resolves #265 2025-07-03 17:08:44 -07:00
Network.i Verilog make pins for liberty pg_pins resolves #326 2025-11-07 11:55:43 -07:00
Network.tcl liberty bundle ports apply func's to members resolves #256 2025-06-16 16:45:21 +02:00
NetworkCmp.cc update copyright 2025-01-21 18:54:33 -07:00
NetworkEdit.i update copyright 2025-01-21 18:54:33 -07:00
NetworkEdit.tcl update copyright 2025-01-21 18:54:33 -07:00
ParseBus.cc update copyright 2025-01-21 18:54:33 -07:00
PortDirection.cc update copyright 2025-01-21 18:54:33 -07:00
SdcNetwork.cc spef support net missing divider escape resolves #311 2025-10-14 15:58:48 -07:00
VerilogNamespace.cc remove using std from headers 2025-04-11 16:59:48 -07:00