Commit Graph

19 Commits

Author SHA1 Message Date
James Cherry 53df9472d7 resizer support 2019-05-27 22:46:24 -07:00
James Cherry 12ca613886 2.0.14 2019-04-18 18:01:10 -07:00
James Cherry 2d519b4740 ucsd 20190410 seg fault accessing/setting power_default_signal_toggle_rate 2019-04-10 20:36:48 -07:00
James Cherry fcfec7ae54 2.0.13 2019-04-01 09:05:07 -07:00
James Cherry e5c9bc43fd 2.0.10 2019-03-12 17:25:53 -07:00
James Cherry 0f2dba7eff sync 2019-02-26 08:26:12 -08:00
James Cherry 63b5d9dd86 report_power internal power 2019-02-18 10:56:38 -08:00
James Cherry d8146af755 remove autotools/configure support 2019-02-16 12:07:59 -08:00
James Cherry 3f65204717 2.0.6 2019-01-26 23:03:01 -08:00
James Cherry ca231b29cc sync 2019-01-25 18:06:24 -08:00
James Cherry 316742202f sync 2019-01-16 15:37:31 -08:00
James Cherry b075ccc783 update copyright 2019-01-01 12:26:11 -08:00
James Cherry b8c43f0e93 sync 2018-12-13 23:53:17 -08:00
James Cherry d84c24882b sync 2018-12-11 10:47:04 -08:00
James Cherry f49dc75d32 sync 2018-12-05 14:18:41 -08:00
James Cherry ddf897d4e6 report_power, pocv support 2018-11-26 09:15:52 -08:00
James Cherry e9bde796ec 2018/11/08 corners > 2 causes internal error, 2018/11/09 Verilog ignore attributes (* blah *) 2018-11-09 10:04:16 -08:00
James Cherry b952c58f92 arnoldi delay calculator 2018-10-24 14:22:21 -07:00
James Cherry 1154fb89fd and then there was light... 2018-09-28 08:54:21 -07:00