James Cherry
|
b4851a6c7d
|
flex disable register decls
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2020-11-11 08:32:25 -07:00 |
|
James Cherry
|
c9296a0d1f
|
disable flex register warnings
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2020-11-09 21:11:29 -07:00 |
|
James Cherry
|
7d31cfac8f
|
flex disable register declarations
|
2020-09-17 05:50:12 -07:00 |
|
James Cherry
|
ee326f165c
|
public headers in include/sta
|
2020-04-05 14:53:44 -07:00 |
|
James Cherry
|
804953e317
|
mv public headers to include/sta
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2020-04-05 11:35:51 -07:00 |
|
James Cherry
|
4a017e86eb
|
update copyright
|
2020-03-06 18:50:37 -08:00 |
|
James Cherry
|
1068813b59
|
UseSWIG cmake support for swig
|
2020-01-25 10:38:03 -07:00 |
|
James Cherry
|
344394de29
|
link_design use verilog library to lookup top
|
2019-06-26 16:01:58 -07:00 |
|
James Cherry
|
9e5aac37f4
|
cmake, write_path_spice
|
2019-01-03 16:14:15 -08:00 |
|
James Cherry
|
b075ccc783
|
update copyright
|
2019-01-01 12:26:11 -08:00 |
|
James Cherry
|
e9bde796ec
|
2018/11/08 corners > 2 causes internal error, 2018/11/09 Verilog ignore attributes (* blah *)
|
2018-11-09 10:04:16 -08:00 |
|
James Cherry
|
1154fb89fd
|
and then there was light...
|
2018-09-28 08:54:21 -07:00 |