Anticipating the merge to the upstream and trying to stabilize the OR CI. Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
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commit
fa0cdd6529
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@ -34,7 +34,7 @@ struct DdManager;
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namespace sta {
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typedef std::map<const LibertyPort*, DdNode*> BddPortVarMap;
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typedef std::map<const LibertyPort*, DdNode*, LibertyPortLess> BddPortVarMap;
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typedef std::map<unsigned, const LibertyPort*> BddVarIdxPortMap;
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class Bdd : public StaState
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@ -145,6 +145,12 @@ enum class TableAxisVariable {
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enum class PathType { clk, data, clk_and_data };
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const int path_type_count = 2;
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class LibertyPortLess
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{
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public:
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bool operator()(const LibertyPort *port1, const LibertyPort *port2) const;
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};
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class LibertyPortNameLess
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{
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public:
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@ -2818,6 +2818,13 @@ sortByName(const LibertyPortSet *set)
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return ports;
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}
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bool
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LibertyPortLess::operator()(const LibertyPort *port1,
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const LibertyPort *port2) const
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{
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return LibertyPort::less(port1, port2);
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}
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bool
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LibertyPortNameLess::operator()(const LibertyPort *port1,
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const LibertyPort *port2) const
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@ -692,10 +692,10 @@ LibertyBuilder::makeMinPulseWidthArcs(LibertyCell *cell,
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from_port = to_port;
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TimingArcSet *arc_set = makeTimingArcSet(cell, from_port, to_port, related_out,
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role, attrs);
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for (auto to_rf : RiseFall::range()) {
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TimingModel *model = attrs->model(to_rf);
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for (const RiseFall *from_rf : RiseFall::range()) {
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TimingModel *model = attrs->model(from_rf);
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if (model)
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makeTimingArc(arc_set, to_rf->opposite(), to_rf, model);
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makeTimingArc(arc_set, from_rf, from_rf->opposite(), model);
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}
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return arc_set;
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}
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@ -2029,8 +2029,8 @@ LibertyReader::makeMinPulseWidthArcs(LibertyPort *port,
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attrs = make_shared<TimingArcAttrs>();
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attrs->setTimingType(TimingType::min_pulse_width);
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}
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// rise/fall_constraint model is on the trailing edge of the pulse.
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const RiseFall *model_rf = hi_low->opposite();
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// rise/fall_constraint model is on the leading edge of the pulse.
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const RiseFall *model_rf = hi_low;
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TimingModel *check_model =
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makeScalarCheckModel(min_width, ScaleFactorType::min_pulse_width, model_rf);
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attrs->setModel(model_rf, check_model);
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@ -426,8 +426,13 @@ LibertyWriter::writeTimingArcSet(const TimingArcSet *arc_set)
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for (const RiseFall *rf : RiseFall::range()) {
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TimingArc *arc = arc_set->arcTo(rf);
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if (arc)
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writeTimingModels(arc, rf);
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if (arc) {
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// Min pulse width arcs are wrt to the leading edge of the pulse.
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const RiseFall *model_rf = (arc_set->role() == TimingRole::width())
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? rf->opposite()
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: rf;
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writeTimingModels(arc, model_rf);
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}
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}
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fprintf(stream_, " }\n");
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