diff --git a/include/sta/Bdd.hh b/include/sta/Bdd.hh
index e34a7bd7..b0497d25 100644
--- a/include/sta/Bdd.hh
+++ b/include/sta/Bdd.hh
@@ -34,7 +34,7 @@ struct DdManager;
 
 namespace sta {
 
-typedef std::map<const LibertyPort*, DdNode*> BddPortVarMap;
+typedef std::map<const LibertyPort*, DdNode*, LibertyPortLess> BddPortVarMap;
 typedef std::map<unsigned, const LibertyPort*> BddVarIdxPortMap;
 
 class Bdd : public StaState
diff --git a/include/sta/LibertyClass.hh b/include/sta/LibertyClass.hh
index b28d0765..06f2729f 100644
--- a/include/sta/LibertyClass.hh
+++ b/include/sta/LibertyClass.hh
@@ -145,6 +145,12 @@ enum class TableAxisVariable {
 enum class PathType { clk, data, clk_and_data };
 const int path_type_count = 2;
 
+class LibertyPortLess
+{
+public:
+  bool operator()(const LibertyPort *port1, const LibertyPort *port2) const;
+};
+
 class LibertyPortNameLess
 {
 public:
diff --git a/liberty/Liberty.cc b/liberty/Liberty.cc
index be42b1bc..f8cab012 100644
--- a/liberty/Liberty.cc
+++ b/liberty/Liberty.cc
@@ -2818,6 +2818,13 @@ sortByName(const LibertyPortSet *set)
   return ports;
 }
 
+bool
+LibertyPortLess::operator()(const LibertyPort *port1,
+                            const LibertyPort *port2) const
+{
+  return LibertyPort::less(port1, port2);
+}
+
 bool
 LibertyPortNameLess::operator()(const LibertyPort *port1,
 				const LibertyPort *port2) const
diff --git a/liberty/LibertyBuilder.cc b/liberty/LibertyBuilder.cc
index 4f57805b..2d4b4a70 100644
--- a/liberty/LibertyBuilder.cc
+++ b/liberty/LibertyBuilder.cc
@@ -692,10 +692,10 @@ LibertyBuilder::makeMinPulseWidthArcs(LibertyCell *cell,
     from_port = to_port;
   TimingArcSet *arc_set = makeTimingArcSet(cell, from_port, to_port, related_out,
                                            role, attrs);
-  for (auto to_rf : RiseFall::range()) {
-    TimingModel *model = attrs->model(to_rf);
+  for (const RiseFall *from_rf : RiseFall::range()) {
+    TimingModel *model = attrs->model(from_rf);
     if (model)
-      makeTimingArc(arc_set, to_rf->opposite(), to_rf, model);
+      makeTimingArc(arc_set, from_rf, from_rf->opposite(), model);
   }
   return arc_set;
 }
diff --git a/liberty/LibertyReader.cc b/liberty/LibertyReader.cc
index e41b1d7d..5e86b347 100644
--- a/liberty/LibertyReader.cc
+++ b/liberty/LibertyReader.cc
@@ -2029,8 +2029,8 @@ LibertyReader::makeMinPulseWidthArcs(LibertyPort *port,
         attrs = make_shared<TimingArcAttrs>();
         attrs->setTimingType(TimingType::min_pulse_width);
       }
-      // rise/fall_constraint model is on the trailing edge of the pulse.
-      const RiseFall *model_rf = hi_low->opposite();
+      // rise/fall_constraint model is on the leading edge of the pulse.
+      const RiseFall *model_rf = hi_low;
       TimingModel *check_model =
         makeScalarCheckModel(min_width, ScaleFactorType::min_pulse_width, model_rf);
       attrs->setModel(model_rf, check_model);
diff --git a/liberty/LibertyWriter.cc b/liberty/LibertyWriter.cc
index 4d7cb6c2..e3d31312 100644
--- a/liberty/LibertyWriter.cc
+++ b/liberty/LibertyWriter.cc
@@ -426,8 +426,13 @@ LibertyWriter::writeTimingArcSet(const TimingArcSet *arc_set)
 
   for (const RiseFall *rf : RiseFall::range()) {
     TimingArc *arc = arc_set->arcTo(rf);
-    if (arc)
-      writeTimingModels(arc, rf);
+    if (arc) {
+      // Min pulse width arcs are wrt to the leading edge of the pulse.
+      const RiseFall *model_rf = (arc_set->role() == TimingRole::width())
+        ? rf->opposite()
+        : rf;
+      writeTimingModels(arc, model_rf);
+    }
   }
 
   fprintf(stream_, "      }\n");