rename examples

Signed-off-by: James Cherry <[email protected]>

examples/delay_calc.tcl

@@ -1,5 +1,5 @@
 # delay calc example
-read_liberty example1_slow.lib
+read_liberty nangate45_slow.lib
 read_verilog example1.v
 link_design top
 create_clock -name clk -period 10 {clk1 clk2 clk3}

examples/example5.tcl

@@ -1,8 +1,8 @@
 # 3 corners with +/- 10% derating example
 define_corners ss tt ff
-read_liberty -corner ss example1_slow.lib
-read_liberty -corner tt example1_typ.lib
-read_liberty -corner ff example1_fast.lib
+read_liberty -corner ss nangate45_slow.lib
+read_liberty -corner tt nangate45_typ.lib
+read_liberty -corner ff nangate45_fast.lib
 read_verilog example1.v
 link_design top
 set_timing_derate -early 0.9

examples/min_max_delays.tcl

@@ -1,6 +1,6 @@
 # min/max delay calc example
-read_liberty -max example1_slow.lib
-read_liberty -min example1_fast.lib
+read_liberty -max nangate45_slow.lib
+read_liberty -min nangate45_fast.lib
 read_verilog example1.v
 link_design top
 create_clock -name clk -period 10 {clk1 clk2 clk3}

examples/multi_corner.tcl

@@ -0,0 +1,15 @@
+# 3 corners with +/- 10% derating example
+define_corners ss tt ff
+read_liberty -corner ss nangate45_slow.lib
+read_liberty -corner tt nangate45_typ.lib
+read_liberty -corner ff nangate45_fast.lib
+read_verilog example1.v
+link_design top
+set_timing_derate -early 0.9
+set_timing_derate -late  1.1
+create_clock -name clk -period 10 {clk1 clk2 clk3}
+set_input_delay -clock clk 0 {in1 in2}
+# report all corners
+report_checks -path_delay min_max
+# report typical corner
+report_checks -corner tt

examples/sdf_delays.tcl

@@ -1,5 +1,5 @@
 # sdf example
-read_liberty example1_slow.lib
+read_liberty nangate45_slow.lib
 read_verilog example1.v
 link_design top
 read_sdf example1.sdf

examples/spef_parasitics.tcl

@@ -1,5 +1,5 @@
-# delay calc example with parasitics
-read_liberty example1_slow.lib
+# delay calc with spef parasitics
+read_liberty nangate45_slow.lib
 read_verilog example1.v
 link_design top
 read_spef example1.dspef