compress example liberty files

Signed-off-by: James Cherry <[email protected]>
2026-08-31 18:14:47 +02:00 · 2024-10-05 18:12:23 -07:00
parent f71405fb40
commit b04def2de0
16 changed files with 11 additions and 573035 deletions
@@ -1,5 +1,5 @@
 # Tests whether Verilog attributes can be parsed and retrieved correctly
-read_liberty ../examples/sky130hd_tt.lib
+read_liberty ../examples/sky130hd_tt.lib.gz
 read_verilog verilog_attribute.v
 link_design counter
 create_clock -name clk [get_ports clk] -period 50