Merge remote-tracking branch 'upstream/master'

Signed-off-by: Matt Liberty <mliberty@precisioninno.com>
This commit is contained in:
Matt Liberty 2025-11-19 19:40:52 +00:00
commit 581364982d
4 changed files with 33 additions and 18 deletions

View File

@ -101,6 +101,7 @@ Power::Power(StaState *sta) :
seq_activity_map_(100, SeqPinHash(network_), SeqPinEqual()),
activities_valid_(false),
bdd_(sta),
instance_powers_valid_(false),
corner_(nullptr)
{
}
@ -118,19 +119,26 @@ Power::clear()
corner_ = nullptr;
}
void
Power::activitiesInvalid()
{
activities_valid_ = false;
instance_powers_valid_ = false;
}
void
Power::setGlobalActivity(float density,
float duty)
{
global_activity_.set(density, duty, PwrActivityOrigin::global);
activities_valid_ = false;
activitiesInvalid();
}
void
Power::unsetGlobalActivity()
{
global_activity_.init();
activities_valid_ = false;
activitiesInvalid();
}
void
@ -138,14 +146,14 @@ Power::setInputActivity(float density,
float duty)
{
input_activity_.set(density, duty, PwrActivityOrigin::input);
activities_valid_ = false;
activitiesInvalid();
}
void
Power::unsetInputActivity()
{
input_activity_.init();
activities_valid_ = false;
activitiesInvalid();
}
void
@ -157,7 +165,7 @@ Power::setInputPortActivity(const Port *input_port,
const Pin *pin = network_->findPin(top_inst, input_port);
if (pin) {
user_activity_map_[pin] = {density, duty, PwrActivityOrigin::user};
activities_valid_ = false;
activitiesInvalid();
}
}
@ -168,7 +176,7 @@ Power::unsetInputPortActivity(const Port *input_port)
const Pin *pin = network_->findPin(top_inst, input_port);
if (pin) {
user_activity_map_.erase(pin);
activities_valid_ = false;
activitiesInvalid();
}
}
@ -179,14 +187,14 @@ Power::setUserActivity(const Pin *pin,
PwrActivityOrigin origin)
{
user_activity_map_[pin] = {density, duty, origin};
activities_valid_ = false;
activitiesInvalid();
}
void
Power::unsetUserActivity(const Pin *pin)
{
user_activity_map_.erase(pin);
activities_valid_ = false;
activitiesInvalid();
}
PwrActivity &
@ -233,7 +241,7 @@ Power::setSeqActivity(const Instance *reg,
PwrActivity &activity)
{
seq_activity_map_[SeqPin(reg, output)] = activity;
activities_valid_ = false;
activitiesInvalid();
}
bool
@ -699,10 +707,9 @@ void
Power::ensureActivities()
{
Stats stats(debug_, report_);
if (!activities_valid_) {
// No need to propagate activites if global activity is set.
if (!global_activity_.isSet()) {
if (!activities_valid_) {
Stats stats(debug_, report_);
// Clear existing activities.
activity_map_.clear();
seq_activity_map_.clear();
@ -738,9 +745,8 @@ Power::ensureActivities()
pass, visitor.maxChange());
pass++;
}
stats.report("Find power activities");
activities_valid_ = true;
}
activities_valid_ = true;
}
stats.report("Power activities");
}
@ -837,9 +843,11 @@ Power::seedRegOutputActivities(const Instance *reg,
void
Power::ensureInstPowers(const Corner *corner)
{
if (instance_powers_.empty()
|| corner != corner_)
if (!instance_powers_valid_
|| corner != corner_) {
findInstPowers(corner);
instance_powers_valid_ = true;
}
}
void

View File

@ -76,6 +76,7 @@ class Power : public StaState
public:
Power(StaState *sta);
void clear();
void activitiesInvalid();
void power(const Corner *corner,
// Return values.
PowerResult &total,
@ -234,6 +235,7 @@ private:
bool activities_valid_;
Bdd bdd_;
std::map<const Instance*, PowerResult> instance_powers_;
bool instance_powers_valid_;
const Corner *corner_;
static constexpr int max_activity_passes_ = 100;

View File

@ -1111,6 +1111,7 @@ Sta::makeClock(const char *name,
sdc_->makeClock(name, pins, add_to_pins, period, waveform, comment);
update_genclks_ = true;
search_->arrivalsInvalid();
power_->activitiesInvalid();
}
void
@ -1135,6 +1136,7 @@ Sta::makeGeneratedClock(const char *name,
edges, edge_shifts, comment);
update_genclks_ = true;
search_->arrivalsInvalid();
power_->activitiesInvalid();
}
void
@ -1142,6 +1144,7 @@ Sta::removeClock(Clock *clk)
{
sdc_->removeClock(clk);
search_->arrivalsInvalid();
power_->activitiesInvalid();
}
bool
@ -1819,6 +1822,7 @@ Sta::setLogicValue(Pin *pin,
sdc_->setLogicValue(pin, value);
// Levelization respects constant disabled edges.
levelize_->invalid();
power_->activitiesInvalid();
sim_->constantsInvalid();
// Constants disable edges which isolate downstream vertices of the
// graph from the delay calculator's BFS search. This means that
@ -1834,6 +1838,7 @@ Sta::setCaseAnalysis(Pin *pin,
LogicValue value)
{
sdc_->setCaseAnalysis(pin, value);
power_->activitiesInvalid();
// Levelization respects constant disabled edges.
levelize_->invalid();
sim_->constantsInvalid();

View File

@ -534,7 +534,7 @@ VerilogReader::makeModuleInst(const string *module_vname,
// to reduce the memory footprint of the verilog parser.
if (liberty_cell
&& hasScalarNamedPortRefs(liberty_cell, pins)) {
int port_count = liberty_cell->portBitCount();
const int port_count = liberty_cell->portBitCount();
StdStringSeq net_names(port_count);
for (VerilogNet *vnet : *pins) {
VerilogNetPortRefScalarNet *vpin =