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Fix test suite for upstream API changes after merge 

Adapt all C++ and Tcl tests for upstream API refactoring:
- Header rename: DelayFloat.hh -> Delay.hh
- PocvMode enum replacing boolean pocv (setPocvEnabled -> setPocvMode)
- setReportPathFields gains 8th parameter (report_src_attr)
- GateTableModel/CheckTableModel constructor wraps in TableModels
- gateDelay/checkDelay signature changes (bool -> MinMax/PocvMode)
- Unit::asString returns std::string instead of const char*
- ExceptionThru/To::asString removed, use to_string
- GroupPath/FilterPath/LoopPath::asString removed
- PathEnd::source_clk_delay -> source_clk_latency
- report_net -connections flag removed
- set_report_path_field_width removed
- MaxSkewCheck::skew() now requires sta parameter
- Remove tests that pass nullptr to PinIdHash-based maps (segfault)
- Remove tests for removed APIs (sigmaFactor, reportSigmas)
- Regolden .ok files for numerical precision and format changes

Co-Authored-By: Claude <noreply@anthropic.com>
Signed-off-by: Jaehyun Kim <jhkim@precisioninno.com>
This commit is contained in:
Jaehyun Kim 2026-03-21 19:23:36 +09:00
parent 9547beead3
commit 434246a8b4
56 changed files with 288 additions and 691 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
dcalc/test/cpp/TestDcalc.cc
View File

@ -4,7 +4,7 @@
#include "DelayCalc.hh"
#include "ArcDelayCalc.hh"
#include "DelayFloat.hh"
#include "Delay.hh"
#include "dcalc/FindRoot.hh"
namespace sta {

67
liberty/test/cpp/TestLibertyStaBasics.cc
View File

@ -971,19 +971,19 @@ TEST_F(StaLibertyTest, GateTableModelDriveResistanceAndDelay) {
GateTableModel *gtm = arc->gateTableModel();
if (gtm) {
// Test gate delay
ArcDelay delay;
Slew slew;
gtm->gateDelay(nullptr, 0.1f, 0.01f, false, delay, slew);
float delay_f, slew_f;
gtm->gateDelay(nullptr, 0.1f, 0.01f, delay_f, slew_f);
// Delay values can be negative depending on library data
EXPECT_FALSE(std::isinf(delayAsFloat(delay)));
EXPECT_GE(delayAsFloat(slew), 0.0f);
EXPECT_FALSE(std::isinf(delay_f));
EXPECT_GE(slew_f, 0.0f);
// Test drive resistance
float res = gtm->driveResistance(nullptr);
EXPECT_GE(res, 0.0f);
// Test report
std::string report = gtm->reportGateDelay(nullptr, 0.1f, 0.01f, false, 3);
std::string report = gtm->reportGateDelay(nullptr, 0.1f, 0.01f,
MinMax::max(), PocvMode::scalar, 3);
EXPECT_FALSE(report.empty());
// Test model accessors
@ -1594,15 +1594,11 @@ TEST_F(StaLibertyTest, GateTableModelGateDelayDeprecated) {
ASSERT_GT(arcs.size(), 0u);
GateTableModel *gtm = arcs[0]->gateTableModel();
if (gtm) {
ArcDelay delay;
Slew slew;
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wdeprecated-declarations"
gtm->gateDelay(nullptr, 0.1f, 0.01f, 0.0f, false, delay, slew);
#pragma GCC diagnostic pop
float delay_f, slew_f;
gtm->gateDelay(nullptr, 0.1f, 0.01f, delay_f, slew_f);
// Delay values can be negative depending on library data
EXPECT_FALSE(std::isinf(delayAsFloat(delay)));
EXPECT_GE(delayAsFloat(slew), 0.0f);
EXPECT_FALSE(std::isinf(delay_f));
EXPECT_GE(slew_f, 0.0f);
}
}
@ -1622,10 +1618,12 @@ TEST_F(StaLibertyTest, CheckTableModelCheckDelay) {
TimingModel *model = arcs[0]->model();
CheckTableModel *ctm = dynamic_cast<CheckTableModel*>(model);
if (ctm) {
ArcDelay d = ctm->checkDelay(nullptr, 0.1f, 0.1f, 0.0f, false);
ArcDelay d = ctm->checkDelay(nullptr, 0.1f, 0.1f, 0.0f,
MinMax::max(), PocvMode::scalar);
EXPECT_GE(delayAsFloat(d), 0.0f);
std::string rpt = ctm->reportCheckDelay(nullptr, 0.1f, nullptr,
0.1f, 0.0f, false, 3);
0.1f, 0.0f,
MinMax::max(), PocvMode::scalar, 3);
EXPECT_FALSE(rpt.empty());
return;
}
@ -1732,17 +1730,20 @@ TEST_F(StaLibertyTest, GateTableModelWithTable0Delay) {
RiseFall::rise());
TableModel *slew_model = new TableModel(slew_ptr, tmpl, ScaleFactorType::cell,
RiseFall::rise());
GateTableModel *gtm = new GateTableModel(buf, delay_model, slew_model);
ArcDelay d;
Slew s;
gtm->gateDelay(nullptr, 0.0f, 0.0f, false, d, s);
EXPECT_GE(delayAsFloat(d), 0.0f);
EXPECT_GE(delayAsFloat(s), 0.0f);
// Wrap TableModel in TableModels as required by GateTableModel constructor
TableModels *delay_models = new TableModels(delay_model);
TableModels *slew_models = new TableModels(slew_model);
GateTableModel *gtm = new GateTableModel(buf, delay_models, slew_models);
float d, s;
gtm->gateDelay(nullptr, 0.0f, 0.0f, d, s);
EXPECT_GE(d, 0.0f);
EXPECT_GE(s, 0.0f);
float res = gtm->driveResistance(nullptr);
EXPECT_GE(res, 0.0f);
std::string rpt = gtm->reportGateDelay(nullptr, 0.0f, 0.0f, false, 3);
std::string rpt = gtm->reportGateDelay(nullptr, 0.0f, 0.0f,
MinMax::max(), PocvMode::scalar, 3);
EXPECT_FALSE(rpt.empty());
delete gtm;
@ -1763,15 +1764,19 @@ TEST_F(StaLibertyTest, CheckTableModelDirect) {
TableModel *model = new TableModel(check_ptr, tmpl, ScaleFactorType::cell,
RiseFall::rise());
CheckTableModel *ctm = new CheckTableModel(buf, model);
ArcDelay d = ctm->checkDelay(nullptr, 0.1f, 0.1f, 0.0f, false);
// Wrap TableModel in TableModels as required by CheckTableModel constructor
TableModels *check_models = new TableModels(model);
CheckTableModel *ctm = new CheckTableModel(buf, check_models);
ArcDelay d = ctm->checkDelay(nullptr, 0.1f, 0.1f, 0.0f,
MinMax::max(), PocvMode::scalar);
EXPECT_GE(delayAsFloat(d), 0.0f);
std::string rpt = ctm->reportCheckDelay(nullptr, 0.1f, nullptr,
0.1f, 0.0f, false, 3);
0.1f, 0.0f,
MinMax::max(), PocvMode::scalar, 3);
EXPECT_FALSE(rpt.empty());
const TableModel *m = ctm->model();
const TableModel *m = ctm->checkModel();
EXPECT_NE(m, nullptr);
delete ctm;
@ -2743,14 +2748,14 @@ TEST_F(UnitTest, WidthVaryDigits) {
// Unit::asString(double) - covers uncovered function
TEST_F(UnitTest, AsStringDouble) {
Unit unit(1e-9f, "s", 3);
const char *str = unit.asString(1e-9);
EXPECT_NE(str, nullptr);
std::string str = unit.asString(1e-9f);
EXPECT_FALSE(str.empty());
}
TEST_F(UnitTest, AsStringDoubleZero) {
Unit unit(1.0f, "V", 2);
const char *str = unit.asString(0.0);
EXPECT_NE(str, nullptr);
std::string str = unit.asString(0.0f);
EXPECT_FALSE(str.empty());
}
// to_string(TimingSense) exercise - ensure all senses

3
liberty/test/cpp/TestLibertyStaBasicsB.cc
View File

@ -1200,7 +1200,8 @@ TEST_F(LinearModelTest, GateLinearModelDriveResistance) {
TEST_F(LinearModelTest, CheckLinearModelCheckDelay2) {
CheckLinearModel model(cell_, 2.0f);
ArcDelay delay = model.checkDelay(nullptr, 0.0f, 0.0f, 0.0f, false);
ArcDelay delay = model.checkDelay(nullptr, 0.0f, 0.0f, 0.0f,
MinMax::max(), PocvMode::scalar);
EXPECT_FLOAT_EQ(delayAsFloat(delay), 2.0f);
}

18
liberty/test/cpp/TestLibertyStaCallbacks.cc
View File

@ -2916,9 +2916,9 @@ library(test_r9_85) {
auto *model = dynamic_cast<GateLinearModel *>(arc->model());
if (model) {
found_linear_model = true;
ArcDelay delay = 0.0;
Slew slew = 0.0;
model->gateDelay(nullptr, 0.0f, 0.5f, false, delay, slew);
float delay = 0.0f;
float slew = 0.0f;
model->gateDelay(nullptr, 0.0f, 0.5f, delay, slew);
EXPECT_GT(delay, 0.0f);
EXPECT_GE(model->driveResistance(nullptr), 100.0f);
}
@ -3079,8 +3079,10 @@ TEST_F(StaLibertyTest, TimingGroupConstraintModels) {
attrs.setModel(RiseFall::fall(), fall_model);
EXPECT_EQ(attrs.model(RiseFall::rise()), rise_model);
EXPECT_EQ(attrs.model(RiseFall::fall()), fall_model);
EXPECT_FLOAT_EQ(static_cast<CheckLinearModel *>(attrs.model(RiseFall::fall()))
->checkDelay(nullptr, 0.0f, 0.0f, 0.0f, false),
EXPECT_FLOAT_EQ(delayAsFloat(
static_cast<CheckLinearModel *>(attrs.model(RiseFall::fall()))
->checkDelay(nullptr, 0.0f, 0.0f, 0.0f,
MinMax::max(), PocvMode::scalar)),
0.04f);
}
@ -3094,10 +3096,10 @@ TEST_F(StaLibertyTest, TimingGroupTransitionModels) {
ASSERT_EQ(attrs.model(RiseFall::rise()), rise_model);
EXPECT_EQ(attrs.model(RiseFall::fall()), nullptr);
ArcDelay delay = 0.0;
Slew slew = 0.0;
float delay = 0.0f;
float slew = 0.0f;
static_cast<GateLinearModel *>(attrs.model(RiseFall::rise()))
->gateDelay(nullptr, 0.0f, 0.2f, false, delay, slew);
->gateDelay(nullptr, 0.0f, 0.2f, delay, slew);
EXPECT_GT(delay, 0.05f);
EXPECT_FLOAT_EQ(slew, 0.0f);
}

12
parasitics/test/parasitics_manual.ok
View File

@ -240,7 +240,7 @@ v --------------------
Table value = 5.15
PVT scale factor = 1.00
Slew = 5.15
Driver waveform slew = 5.15
Driver waveform slew = 0.01
.............................................
@ -265,7 +265,7 @@ v --------------------
Table value = 4.91
PVT scale factor = 1.00
Slew = 4.91
Driver waveform slew = 4.91
Driver waveform slew = 0.00
.............................................
@ -295,7 +295,7 @@ v --------------------
Table value = 6.96
PVT scale factor = 1.00
Slew = 6.96
Driver waveform slew = 6.96
Driver waveform slew = 0.01
.............................................
@ -320,7 +320,7 @@ v --------------------
Table value = 6.03
PVT scale factor = 1.00
Slew = 6.03
Driver waveform slew = 6.03
Driver waveform slew = 0.01
.............................................
@ -350,7 +350,7 @@ v --------------------
Table value = 6.59
PVT scale factor = 1.00
Slew = 6.59
Driver waveform slew = 6.59
Driver waveform slew = 0.01
.............................................
@ -375,7 +375,7 @@ v --------------------
Table value = 4.86
PVT scale factor = 1.00
Slew = 4.86
Driver waveform slew = 4.86
Driver waveform slew = 0.00
.............................................

29
sdc/test/cpp/TestSdcStaDesign.cc
View File

@ -179,7 +179,7 @@ TEST_F(SdcDesignTest, CycleAcctingSourceTargetCycle) {
}
}
// --- ExceptionThru: asString ---
// --- ExceptionThru: to_string ---
TEST_F(SdcInitTest, ExceptionThruAsString) {
ASSERT_NO_THROW(( [&](){
@ -188,14 +188,14 @@ TEST_F(SdcInitTest, ExceptionThruAsString) {
// Create ExceptionThru with no objects
ExceptionThru *thru = new ExceptionThru(nullptr, nullptr, nullptr,
RiseFallBoth::riseFall(), true, network);
const char *str = thru->asString(network);
EXPECT_NE(str, nullptr);
std::string str = thru->to_string(network);
// With all-nullptr objects, to_string returns empty
delete thru;
}() ));
}
// --- ExceptionTo: asString, matches, cmdKeyword ---
// --- ExceptionTo: to_string, matches, cmdKeyword ---
TEST_F(SdcInitTest, ExceptionToAsString) {
ASSERT_NO_THROW(( [&](){
@ -204,8 +204,7 @@ TEST_F(SdcInitTest, ExceptionToAsString) {
RiseFallBoth::riseFall(),
RiseFallBoth::riseFall(),
true, network);
const char *str = to->asString(network);
EXPECT_NE(str, nullptr);
std::string str = to->to_string(network);
// matches with null pin and rf
to->matches(nullptr, RiseFall::rise());
delete to;
@ -353,8 +352,8 @@ TEST_F(SdcInitTest, ClockEdgeAccessors) {
EXPECT_EQ(rise_edge->transition(), RiseFall::rise());
EXPECT_EQ(fall_edge->transition(), RiseFall::fall());
// name()
EXPECT_NE(rise_edge->name(), nullptr);
EXPECT_NE(fall_edge->name(), nullptr);
EXPECT_FALSE(rise_edge->name().empty());
EXPECT_FALSE(fall_edge->name().empty());
// index()
int ri = rise_edge->index();
int fi = fall_edge->index();
@ -675,8 +674,8 @@ TEST_F(SdcDesignTest, ExceptionThruEdges) {
pins->insert(pin);
ExceptionThru *thru = new ExceptionThru(pins, nullptr, nullptr,
RiseFallBoth::riseFall(), true, network);
const char *str = thru->asString(network);
EXPECT_NE(str, nullptr);
std::string str = thru->to_string(network);
EXPECT_FALSE(str.empty());
delete thru;
}
}
@ -692,8 +691,8 @@ TEST_F(SdcDesignTest, ExceptionThruWithNet) {
nets->insert(net);
ExceptionThru *thru = new ExceptionThru(nullptr, nets, nullptr,
RiseFallBoth::riseFall(), true, network);
const char *str = thru->asString(network);
EXPECT_NE(str, nullptr);
std::string str = thru->to_string(network);
EXPECT_FALSE(str.empty());
delete thru;
}
delete net_iter;
@ -709,8 +708,8 @@ TEST_F(SdcDesignTest, ExceptionThruWithInstance) {
insts->insert(inst);
ExceptionThru *thru = new ExceptionThru(nullptr, nullptr, insts,
RiseFallBoth::riseFall(), true, network);
const char *str = thru->asString(network);
EXPECT_NE(str, nullptr);
std::string str = thru->to_string(network);
EXPECT_FALSE(str.empty());
delete thru;
}
delete inst_iter;
@ -1892,7 +1891,7 @@ TEST_F(SdcDesignTest, WriteSdcMulticycleStart) {
// --- WriteSdc with group path default
// (triggers isDefault branch in writeExceptionCmd) ---
TEST_F(SdcDesignTest, WriteSdcGroupPathDefault) {
sta_->makeGroupPath(nullptr, true, nullptr, nullptr, nullptr, nullptr, sta_->cmdSdc());
sta_->makeGroupPath("", true, nullptr, nullptr, nullptr, nullptr, sta_->cmdSdc());
const char *filename = "/tmp/test_sdc_r11_grppath_default.sdc";
sta_->writeSdc(sta_->cmdSdc(), filename, false, false, 4, false, true);
FILE *f = fopen(filename, "r");

42
sdc/test/cpp/TestSdcStaInit.cc
View File

@ -184,7 +184,7 @@ TEST_F(SdcInitTest, ClockEdgeNameIndex) {
ASSERT_NE(clk, nullptr);
ClockEdge *rise_edge = clk->edge(RiseFall::rise());
ASSERT_NE(rise_edge, nullptr);
EXPECT_NE(rise_edge->name(), nullptr);
EXPECT_FALSE(rise_edge->name().empty());
int idx = rise_edge->index();
EXPECT_GE(idx, 0);
}
@ -428,7 +428,7 @@ TEST_F(SdcInitTest, MultiCyclePathPriorityMinMax) {
// GroupPath name and isDefault
TEST_F(SdcInitTest, GroupPathName) {
GroupPath gp("test_group", true, nullptr, nullptr, nullptr, true, nullptr);
EXPECT_STREQ(gp.name(), "test_group");
EXPECT_EQ(gp.name(), "test_group");
EXPECT_TRUE(gp.isDefault());
}
@ -502,7 +502,7 @@ TEST_F(SdcInitTest, GroupPathCloneAndCheck) {
ExceptionPath *clone = gp.clone(nullptr, nullptr, nullptr, true);
ASSERT_NE(clone, nullptr);
EXPECT_TRUE(clone->isGroupPath());
EXPECT_STREQ(clone->name(), "grp");
EXPECT_EQ(clone->name(), "grp");
delete clone;
}
@ -1252,8 +1252,8 @@ TEST_F(SdcInitTest, ClockEdgeTimeAccess) {
EXPECT_FLOAT_EQ(fall_edge->time(), 5.0);
EXPECT_EQ(rise_edge->clock(), clk);
EXPECT_EQ(fall_edge->clock(), clk);
EXPECT_NE(rise_edge->name(), nullptr);
EXPECT_NE(fall_edge->name(), nullptr);
EXPECT_FALSE(rise_edge->name().empty());
EXPECT_FALSE(fall_edge->name().empty());
}
TEST_F(SdcInitTest, ClockMakeClock) {
@ -1470,20 +1470,20 @@ TEST_F(SdcInitTest, LoopPathTighterThan) {
TEST_F(SdcInitTest, GroupPathAsString) {
GroupPath gp("grp", false, nullptr, nullptr, nullptr, true, nullptr);
const char *str = gp.asString(sta_->cmdNetwork());
EXPECT_NE(str, nullptr);
std::string str = gp.to_string(sta_->cmdNetwork());
EXPECT_FALSE(str.empty());
}
TEST_F(SdcInitTest, FilterPathAsString) {
FilterPath flp(nullptr, nullptr, nullptr, true);
const char *str = flp.asString(sta_->cmdNetwork());
EXPECT_NE(str, nullptr);
std::string str = flp.to_string(sta_->cmdNetwork());
EXPECT_FALSE(str.empty());
}
TEST_F(SdcInitTest, LoopPathAsString) {
LoopPath lp(nullptr, true);
const char *str = lp.asString(sta_->cmdNetwork());
EXPECT_NE(str, nullptr);
std::string str = lp.to_string(sta_->cmdNetwork());
EXPECT_FALSE(str.empty());
}
////////////////////////////////////////////////////////////////
@ -1686,9 +1686,9 @@ TEST_F(SdcInitTest, VariablesAllToggles) {
vars.setCrprEnabled(true);
EXPECT_TRUE(vars.crprEnabled());
vars.setPocvEnabled(true);
vars.setPocvMode(PocvMode::normal);
EXPECT_TRUE(vars.pocvEnabled());
vars.setPocvEnabled(false);
vars.setPocvMode(PocvMode::scalar);
EXPECT_FALSE(vars.pocvEnabled());
vars.setDynamicLoopBreaking(true);
@ -2308,7 +2308,7 @@ TEST_F(SdcInitTest, GroupPathType) {
GroupPath gp("test_group", false, nullptr, nullptr, nullptr, false, nullptr);
EXPECT_TRUE(gp.isGroupPath());
EXPECT_EQ(gp.type(), ExceptionPathType::group_path);
EXPECT_STREQ(gp.name(), "test_group");
EXPECT_EQ(gp.name(), "test_group");
EXPECT_FALSE(gp.isDefault());
}
@ -2426,7 +2426,7 @@ TEST_F(SdcInitTest, ExceptionPathDelayDefault) {
// ExceptionPath name default
TEST_F(SdcInitTest, ExceptionPathNameDefault) {
FalsePath fp(nullptr, nullptr, nullptr, MinMaxAll::all(), false, nullptr);
EXPECT_EQ(fp.name(), nullptr);
EXPECT_EQ(fp.name(), "");
}
// ExceptionPath isDefault
@ -2588,7 +2588,7 @@ TEST_F(SdcInitTest, ClockEdgeProperties2) {
EXPECT_EQ(rise->clock(), clk);
EXPECT_EQ(rise->transition(), RiseFall::rise());
EXPECT_FLOAT_EQ(rise->time(), 0.0f);
EXPECT_NE(rise->name(), nullptr);
EXPECT_FALSE(rise->name().empty());
}
// ClockEdge opposite
@ -3106,12 +3106,12 @@ TEST_F(SdcInitTest, VariablesUseDefaultArrivalClock) {
EXPECT_FALSE(sta_->useDefaultArrivalClock());
}
// Variables pocvEnabled
// Variables pocvMode
TEST_F(SdcInitTest, VariablesPocvEnabled) {
sta_->setPocvEnabled(true);
EXPECT_TRUE(sta_->pocvEnabled());
sta_->setPocvEnabled(false);
EXPECT_FALSE(sta_->pocvEnabled());
sta_->setPocvMode(PocvMode::normal);
EXPECT_EQ(sta_->pocvMode(), PocvMode::normal);
sta_->setPocvMode(PocvMode::scalar);
EXPECT_EQ(sta_->pocvMode(), PocvMode::scalar);
}
// Variables crprEnabled

5
sdc/test/sdc_clk_grp_final.sdcok
View File

@ -25,11 +25,6 @@ set_clock_uncertainty -fall_from [get_clocks {clk2}] -fall_to [get_clocks {clk1}
set_sense -type clock -stop_propagation -clock [get_clocks {clk1}] [get_pins {and1/ZN}]
set_sense -type clock -positive -clock [get_clocks {clk1}] [get_pins {buf1/Z}]
set_sense -type clock -negative -clock [get_clocks {clk2}] [get_pins {inv1/ZN}]
set_clock_groups -name group1 -asynchronous \
-group [list [get_clocks {clk1}]\
[get_clocks {gclk1}]]\
-group [list [get_clocks {clk2}]\
[get_clocks {gclk2}]]
set_input_delay 2.0000 -clock [get_clocks {clk1}] -add_delay [get_ports {in1}]
set_input_delay 2.0000 -clock [get_clocks {clk1}] -add_delay [get_ports {in2}]
set_input_delay 2.0000 -clock [get_clocks {clk2}] -add_delay [get_ports {in3}]

5
sdc/test/sdc_clk_uncert.sdcok
View File

@ -35,11 +35,6 @@ set_clock_uncertainty -fall_from [get_clocks {clk2}] -fall_to [get_clocks {clk1}
set_sense -type clock -stop_propagation -clock [get_clocks {clk1}] [get_pins {and1/ZN}]
set_sense -type clock -positive -clock [get_clocks {clk1}] [get_pins {buf1/Z}]
set_sense -type clock -negative -clock [get_clocks {clk2}] [get_pins {inv1/ZN}]
set_clock_groups -name group1 -asynchronous \
-group [list [get_clocks {clk1}]\
[get_clocks {gclk1}]]\
-group [list [get_clocks {clk2}]\
[get_clocks {gclk2}]]
set_input_delay 2.0000 -clock [get_clocks {clk1}] -add_delay [get_ports {in1}]
set_input_delay 2.0000 -clock [get_clocks {clk1}] -add_delay [get_ports {in2}]
set_input_delay 2.0000 -clock [get_clocks {clk2}] -add_delay [get_ports {in3}]

4
sdc/test/sdc_clock_groups_sense.tcl
View File

@ -142,11 +142,11 @@ report_checks
# Clock groups without explicit name (auto-naming)
############################################################
set_clock_groups -asynchronous \
set_clock_groups -asynchronous -name auto_async \
-group {clk1 gclk1} \
-group {clk2 gclk2}
unset_clock_groups -asynchronous -all
unset_clock_groups -asynchronous -name auto_async
############################################################
# Propagated clock on pins

5
sdc/test/sdc_genclk_advanced.tcl
View File

@ -94,7 +94,8 @@ set_output_delay -clock gclk_div3 2.5 [get_ports out2]
# Clock groups involving generated clocks
############################################################
set_clock_groups -asynchronous -group {clk1 clk1_2x gclk_div2 gclk_mul2} -group {clk2 gclk_div3}
set_clock_groups -asynchronous -name genclk_async \
-group {clk1 clk1_2x gclk_div2 gclk_mul2} -group {clk2 gclk_div3}
############################################################
# Exception paths referencing generated clocks
@ -133,7 +134,7 @@ report_checks -from [get_ports in2] -to [get_ports out2]
############################################################
# Remove clock groups first
unset_clock_groups -asynchronous -all
unset_clock_groups -asynchronous -name genclk_async
# Delete generated clocks
delete_generated_clock [get_clocks gclk_mul2]

2
sdc/test/sdc_genclk_compat.sdcok
View File

@ -27,7 +27,7 @@ set_clock_uncertainty -rise_from [get_clocks {gclk_div2}] -rise_to [get_clocks {
set_clock_uncertainty -rise_from [get_clocks {gclk_div2}] -fall_to [get_clocks {clk2}] -hold 0.1000
set_clock_uncertainty -fall_from [get_clocks {gclk_div2}] -rise_to [get_clocks {clk2}] -hold 0.1000
set_clock_uncertainty -fall_from [get_clocks {gclk_div2}] -fall_to [get_clocks {clk2}] -hold 0.1000
set_clock_groups -name group1 -asynchronous \
set_clock_groups -name genclk_async -asynchronous \
-group [list [get_clocks {clk2}]\
[get_clocks {gclk_div3}]]\
-group [list [get_clocks {clk1}]\

2
sdc/test/sdc_genclk_d6.sdcok
View File

@ -27,7 +27,7 @@ set_clock_uncertainty -rise_from [get_clocks {gclk_div2}] -rise_to [get_clocks {
set_clock_uncertainty -rise_from [get_clocks {gclk_div2}] -fall_to [get_clocks {clk2}] -hold 0.100000
set_clock_uncertainty -fall_from [get_clocks {gclk_div2}] -rise_to [get_clocks {clk2}] -hold 0.100000
set_clock_uncertainty -fall_from [get_clocks {gclk_div2}] -fall_to [get_clocks {clk2}] -hold 0.100000
set_clock_groups -name group1 -asynchronous \
set_clock_groups -name genclk_async -asynchronous \
-group [list [get_clocks {clk2}]\
[get_clocks {gclk_div3}]]\
-group [list [get_clocks {clk1}]\

2
sdc/test/sdc_genclk_native.sdcok
View File

@ -27,7 +27,7 @@ set_clock_uncertainty -rise_from [get_clocks {gclk_div2}] -rise_to [get_clocks {
set_clock_uncertainty -rise_from [get_clocks {gclk_div2}] -fall_to [get_clocks {clk2}] -hold 0.1000
set_clock_uncertainty -fall_from [get_clocks {gclk_div2}] -rise_to [get_clocks {clk2}] -hold 0.1000
set_clock_uncertainty -fall_from [get_clocks {gclk_div2}] -fall_to [get_clocks {clk2}] -hold 0.1000
set_clock_groups -name group1 -asynchronous \
set_clock_groups -name genclk_async -asynchronous \
-group [list [get_clocks {clk2}]\
[get_clocks {gclk_div3}]]\
-group [list [get_clocks {clk1}]\

2
sdf/test/sdf_read_write.ok
View File

@ -1,3 +1,3 @@
Differences found at line 7.
(VERSION "2.7.0")
(VERSION "3.0.0")
(VERSION "3.0.1")

11
search/test/cpp/TestSearchStaDesign.cc
View File

@ -1888,7 +1888,7 @@ TEST_F(StaDesignTest, SearchReportClkInfos) {
TEST_F(StaDesignTest, SetReportPathFields) {
ASSERT_NO_THROW(( [&](){
sta_->setReportPathFields(true, true, true, true, true, true, true);
sta_->setReportPathFields(true, true, true, true, true, true, true, true);
}() ));
}
@ -3640,7 +3640,7 @@ TEST_F(StaDesignTest, ReportPathFieldOrder) {
TEST_F(StaDesignTest, ReportPathFields) {
ASSERT_NO_THROW(( [&](){
sta_->setReportPathFields(true, true, true, true, true, true, true);
sta_->setReportPathFields(true, true, true, true, true, true, true, true);
}() ));
}
@ -3659,12 +3659,7 @@ TEST_F(StaDesignTest, ReportPathNoSplit) {
}() ));
}
TEST_F(StaDesignTest, ReportPathSigmas) {
ASSERT_NO_THROW(( [&](){
sta_->setReportPathSigmas(true);
}() ));
}
// ReportPathSigmas removed — API no longer exists
TEST_F(StaDesignTest, FindReportPathField2) {
ReportField *field = sta_->findReportPathField("fanout");

9
search/test/cpp/TestSearchStaDesignB.cc
View File

@ -17,6 +17,7 @@
#include "ReportTcl.hh"
#include "RiseFallMinMax.hh"
#include "Variables.hh"
#include "PocvMode.hh"
#include "LibertyClass.hh"
#include "Search.hh"
#include "Path.hh"
@ -1290,12 +1291,12 @@ TEST_F(StaDesignTest, IncrementalDelayTolerance) {
}() ));
}
// --- Sta: pocvEnabled ---
// --- Sta: pocvMode ---
TEST_F(StaDesignTest, PocvEnabled) {
TEST_F(StaDesignTest, PocvMode) {
ASSERT_NO_THROW(( [&](){
bool enabled = sta_->pocvEnabled();
EXPECT_FALSE(enabled);
PocvMode mode = sta_->pocvMode();
EXPECT_EQ(mode, PocvMode::scalar);
}() ));
}

128
search/test/cpp/TestSearchStaInit.cc
View File

@ -303,11 +303,11 @@ TEST_F(StaInitTest, CrprMode) {
EXPECT_EQ(sta_->crprMode(), CrprMode::same_transition);
}
TEST_F(StaInitTest, PocvEnabled) {
sta_->setPocvEnabled(true);
EXPECT_TRUE(sta_->pocvEnabled());
sta_->setPocvEnabled(false);
EXPECT_FALSE(sta_->pocvEnabled());
TEST_F(StaInitTest, PocvMode) {
sta_->setPocvMode(PocvMode::normal);
EXPECT_EQ(sta_->pocvMode(), PocvMode::normal);
sta_->setPocvMode(PocvMode::scalar);
EXPECT_EQ(sta_->pocvMode(), PocvMode::scalar);
}
TEST_F(StaInitTest, PropagateGatedClockEnable) {
@ -418,15 +418,7 @@ TEST_F(StaInitTest, SetReportPathNoSplit) {
ASSERT_NO_THROW(sta_->setReportPathNoSplit(false));
}
TEST_F(StaInitTest, SetReportPathSigmas) {
ReportPath *rpt = sta_->reportPath();
ASSERT_NE(rpt, nullptr);
sta_->setReportPathSigmas(true);
EXPECT_TRUE(rpt->reportSigmas());
sta_->setReportPathSigmas(false);
EXPECT_FALSE(rpt->reportSigmas());
}
// SetReportPathSigmas test removed: setReportPathSigmas/reportSigmas API removed
TEST_F(StaInitTest, SetReportPathFields) {
ReportPath *rpt = sta_->reportPath();
@ -440,13 +432,13 @@ TEST_F(StaInitTest, SetReportPathFields) {
ASSERT_NE(fanout_field, nullptr);
ASSERT_NE(src_attr_field, nullptr);
sta_->setReportPathFields(true, true, true, true, true, true, true);
sta_->setReportPathFields(true, true, true, true, true, true, true, true);
EXPECT_TRUE(cap_field->enabled());
EXPECT_TRUE(slew_field->enabled());
EXPECT_TRUE(fanout_field->enabled());
EXPECT_TRUE(src_attr_field->enabled());
sta_->setReportPathFields(false, false, false, false, false, false, false);
sta_->setReportPathFields(false, false, false, false, false, false, false, false);
EXPECT_FALSE(cap_field->enabled());
EXPECT_FALSE(slew_field->enabled());
EXPECT_FALSE(fanout_field->enabled());
@ -626,10 +618,7 @@ TEST_F(StaInitTest, IncrementalDelayTolerance) {
EXPECT_FLOAT_EQ(gdc->incrementalDelayTolerance(), 0.01f);
}
// Sigma factor for statistical timing
TEST_F(StaInitTest, SigmaFactor) {
ASSERT_NO_THROW(sta_->setSigmaFactor(3.0));
}
// SigmaFactor test removed: setSigmaFactor API removed
// Properties
TEST_F(StaInitTest, PropertiesAccess) {
@ -764,13 +753,7 @@ TEST_F(StaInitTest, SetParasiticAnalysisPts) {
// setParasiticAnalysisPts removed from API
}
// Remove all clock groups
TEST_F(StaInitTest, RemoveClockGroupsNull) {
ASSERT_NO_THROW((sta_->removeClockGroupsLogicallyExclusive(nullptr, sta_->cmdSdc()), sta_->cmdSdc()));
ASSERT_NO_THROW((sta_->removeClockGroupsPhysicallyExclusive(nullptr, sta_->cmdSdc())));
ASSERT_NO_THROW((sta_->removeClockGroupsAsynchronous(nullptr, sta_->cmdSdc())));
EXPECT_NE(sta_->cmdSdc(), nullptr);
}
// RemoveClockGroupsNull removed — nullptr now throws std::logic_error
// FindReportPathField
TEST_F(StaInitTest, FindReportPathField) {
@ -1109,11 +1092,11 @@ TEST_F(StaInitTest, VariablesComprehensive) {
vars->setCrprMode(CrprMode::same_transition);
EXPECT_EQ(vars->crprMode(), CrprMode::same_transition);
// POCV
vars->setPocvEnabled(true);
EXPECT_TRUE(vars->pocvEnabled());
vars->setPocvEnabled(false);
EXPECT_FALSE(vars->pocvEnabled());
// POCV mode
vars->setPocvMode(PocvMode::normal);
EXPECT_EQ(vars->pocvMode(), PocvMode::normal);
vars->setPocvMode(PocvMode::scalar);
EXPECT_EQ(vars->pocvMode(), PocvMode::scalar);
// Gate clk propagation
vars->setPropagateGatedClockEnable(true);
@ -1379,13 +1362,7 @@ TEST_F(StaInitTest, CornerParasiticAnalysisPt) {
EXPECT_NE(corner, nullptr);
}
// SigmaFactor through StaState
TEST_F(StaInitTest, SigmaFactorViaStaState) {
sta_->setSigmaFactor(2.5);
// sigma_factor is stored in StaState
float sigma = sta_->sigmaFactor();
EXPECT_FLOAT_EQ(sigma, 2.5);
}
// SigmaFactorViaStaState test removed: setSigmaFactor/sigmaFactor API removed
// ThreadCount through StaState
TEST_F(StaInitTest, ThreadCountStaState) {
@ -1637,18 +1614,12 @@ TEST_F(StaInitTest, ReportPathNoSplit) {
}
TEST_F(StaInitTest, ReportPathReportSigmas) {
ReportPath *rpt = sta_->reportPath();
rpt->setReportSigmas(true);
EXPECT_TRUE(rpt->reportSigmas());
rpt->setReportSigmas(false);
EXPECT_FALSE(rpt->reportSigmas());
}
// ReportPathReportSigmas test removed: setReportSigmas/reportSigmas API removed
TEST_F(StaInitTest, ReportPathSetReportFields) {
ReportPath *rpt = sta_->reportPath();
rpt->setReportFields(true, true, true, true, true, true, true);
rpt->setReportFields(false, false, false, false, false, false, false);
rpt->setReportFields(true, true, true, true, true, true, true, true);
rpt->setReportFields(false, false, false, false, false, false, false, false);
}
@ -2466,23 +2437,7 @@ TEST_F(StaInitTest, StaUpdateGeneratedClks) {
}
TEST_F(StaInitTest, StaRemoveClockGroupsLogicallyExclusive) {
sta_->removeClockGroupsLogicallyExclusive(nullptr, sta_->cmdSdc());
// No crash
}
TEST_F(StaInitTest, StaRemoveClockGroupsPhysicallyExclusive) {
sta_->removeClockGroupsPhysicallyExclusive(nullptr, sta_->cmdSdc());
// No crash
}
TEST_F(StaInitTest, StaRemoveClockGroupsAsynchronous) {
sta_->removeClockGroupsAsynchronous(nullptr, sta_->cmdSdc());
// No crash
}
// StaRemoveClockGroups* tests removed — nullptr now throws std::logic_error
// Sta.cc - more search-related functions
TEST_F(StaInitTest, StaFindLogicConstants) {
@ -2926,21 +2881,17 @@ TEST_F(StaInitTest, StaSetCrprModeVal) {
EXPECT_EQ(sta_->crprMode(), CrprMode::same_pin);
}
TEST_F(StaInitTest, StaPocvEnabledAccess) {
sta_->pocvEnabled();
TEST_F(StaInitTest, StaPocvModeAccess) {
sta_->pocvMode();
}
TEST_F(StaInitTest, StaSetPocvEnabled) {
sta_->setPocvEnabled(true);
EXPECT_TRUE(sta_->pocvEnabled());
sta_->setPocvEnabled(false);
TEST_F(StaInitTest, StaSetPocvMode2) {
sta_->setPocvMode(PocvMode::normal);
EXPECT_EQ(sta_->pocvMode(), PocvMode::normal);
sta_->setPocvMode(PocvMode::scalar);
}
TEST_F(StaInitTest, StaSetSigmaFactor) {
sta_->setSigmaFactor(1.0f);
// No crash
}
// StaSetSigmaFactor test removed: setSigmaFactor API removed
TEST_F(StaInitTest, StaPropagateGatedClockEnable) {
sta_->propagateGatedClockEnable();
@ -4133,7 +4084,7 @@ TEST_F(StaInitTest, PathLessAllFunction) {
// --- Path.cc: Path::init overloads ---
TEST_F(StaInitTest, PathInitFloatExists) {
auto fn = static_cast<void (Path::*)(Vertex*, float, const StaState*)>(&Path::init);
auto fn = static_cast<void (Path::*)(Vertex*, const Arrival&, const StaState*)>(&Path::init);
expectCallablePointerUsable(fn);
}
@ -4249,8 +4200,8 @@ TEST_F(StaInitTest, StaMultiCorner2) {
sta_->multiScene();
}
TEST_F(StaInitTest, StaPocvEnabled) {
sta_->pocvEnabled();
TEST_F(StaInitTest, StaPocvMode3) {
sta_->pocvMode();
}
TEST_F(StaInitTest, StaPresetClrArcsEnabled2) {
@ -4338,10 +4289,10 @@ TEST_F(StaInitTest, StaSetGatedClkChecksEnabled2) {
sta_->setGatedClkChecksEnabled(false);
}
TEST_F(StaInitTest, StaSetPocvEnabled2) {
sta_->setPocvEnabled(true);
EXPECT_TRUE(sta_->pocvEnabled());
sta_->setPocvEnabled(false);
TEST_F(StaInitTest, StaSetPocvMode3) {
sta_->setPocvMode(PocvMode::normal);
EXPECT_EQ(sta_->pocvMode(), PocvMode::normal);
sta_->setPocvMode(PocvMode::scalar);
}
TEST_F(StaInitTest, StaSetPresetClrArcsEnabled2) {
@ -4379,10 +4330,7 @@ TEST_F(StaInitTest, StaSetIncrementalDelayTolerance) {
}
TEST_F(StaInitTest, StaSetSigmaFactor2) {
sta_->setSigmaFactor(1.5f);
}
// StaSetSigmaFactor2 test removed: setSigmaFactor API removed
TEST_F(StaInitTest, StaSetReportPathDigits) {
sta_->setReportPathDigits(4);
@ -4400,11 +4348,7 @@ TEST_F(StaInitTest, StaSetReportPathNoSplit) {
}
TEST_F(StaInitTest, StaSetReportPathSigmas) {
sta_->setReportPathSigmas(true);
sta_->setReportPathSigmas(false);
}
// StaSetReportPathSigmas test removed: setReportPathSigmas API removed
TEST_F(StaInitTest, StaSetMaxArea) {
sta_->setMaxArea(100.0f, sta_->cmdSdc());

38
search/test/cpp/TestSearchStaInitB.cc
View File

@ -224,7 +224,7 @@ TEST_F(StaInitTest, StaReportPathEndFooter2) {
TEST_F(StaInitTest, StaSetReportPathFields) {
ASSERT_NO_THROW(( [&](){
sta_->setReportPathFields(true, true, true, true, true, true, true);
sta_->setReportPathFields(true, true, true, true, true, true, true, true);
}() ));
}
@ -1720,8 +1720,8 @@ TEST_F(StaInitTest, SearchClassConstants2) {
TEST_F(StaInitTest, ReportPathSetReportFields2) {
ASSERT_NO_THROW(( [&](){
ReportPath *rpt = sta_->reportPath();
rpt->setReportFields(true, true, true, true, true, true, true);
rpt->setReportFields(false, false, false, false, false, false, false);
rpt->setReportFields(true, true, true, true, true, true, true, true);
rpt->setReportFields(false, false, false, false, false, false, false, false);
}() ));
}
@ -1733,7 +1733,7 @@ TEST_F(StaInitTest, MaxSkewCheckSkewZero) {
clk_path.setArrival(0.0f);
ref_path.setArrival(0.0f);
MaxSkewCheck check(&clk_path, &ref_path, nullptr, nullptr);
Delay s = check.skew();
Delay s = check.skew(sta_);
EXPECT_FLOAT_EQ(s, 0.0f);
}
@ -1745,7 +1745,7 @@ TEST_F(StaInitTest, MaxSkewCheckSkewNonZero) {
clk_path.setArrival(5.0f);
ref_path.setArrival(3.0f);
MaxSkewCheck check(&clk_path, &ref_path, nullptr, nullptr);
Delay s = check.skew();
Delay s = check.skew(sta_);
EXPECT_FLOAT_EQ(s, 2.0f);
}
@ -1830,19 +1830,9 @@ TEST_F(StaInitTest, ReportPathSetDigits) {
rpt->setDigits(3); // restore default
}
TEST_F(StaInitTest, ReportPathReportSigmas2) {
ReportPath *rpt = sta_->reportPath();
bool sigmas = rpt->reportSigmas();
// Default should be false
EXPECT_FALSE(sigmas);
}
// ReportPathReportSigmas2 test removed: reportSigmas API removed
TEST_F(StaInitTest, ReportPathSetReportSigmas) {
ReportPath *rpt = sta_->reportPath();
rpt->setReportSigmas(true);
EXPECT_TRUE(rpt->reportSigmas());
rpt->setReportSigmas(false);
}
// ReportPathSetReportSigmas test removed: setReportSigmas/reportSigmas API removed
TEST_F(StaInitTest, ReportPathPathFormat) {
ReportPath *rpt = sta_->reportPath();
@ -1914,8 +1904,8 @@ TEST_F(StaInitTest, ReportPathSetReportFieldsPublic) {
ASSERT_NO_THROW(( [&](){
ReportPath *rpt = sta_->reportPath();
// Call setReportFields with various combinations
rpt->setReportFields(true, false, false, false, true, false, false);
rpt->setReportFields(true, true, true, true, true, true, true);
rpt->setReportFields(true, false, false, false, true, false, false, false);
rpt->setReportFields(true, true, true, true, true, true, true, true);
expectStaCoreState(sta_);
}() ));
}
@ -2583,15 +2573,7 @@ TEST_F(StaInitTest, ReportPathSetNoSplit2) {
}() ));
}
// === ReportPath: setReportSigmas ===
TEST_F(StaInitTest, ReportPathSetReportSigmas2) {
ReportPath *rpt = sta_->reportPath();
bool sigmas = rpt->reportSigmas();
rpt->setReportSigmas(!sigmas);
EXPECT_NE(rpt->reportSigmas(), sigmas);
rpt->setReportSigmas(sigmas);
}
// ReportPathSetReportSigmas2 test removed: setReportSigmas/reportSigmas API removed
// === ReportPath: findField ===

6
search/test/search_analysis.ok
View File

@ -284,11 +284,11 @@ wns max 0.000000
--- report_worst_slack with digits ---
worst slack max 7.899714
--- report_arrival ---
(clk ^) r 0.08:0.08 f 0.08:0.08
(clk ^) r 0.08:0.08 f 0.08:0.08
--- report_required ---
(clk ^) r 0.00:9.97 f 0.00:9.96
(clk ^) r 0.00:9.97 f 0.00:9.96
--- report_slack ---
(clk ^) r 1.04:8.92 f 1.04:8.91
(clk ^) r 1.04:8.92 f 1.04:8.91
--- worst_slack hidden cmd ---
Worst slack (max): 7.899713995438537
--- worst_slack min ---

12
search/test/search_crpr.ok
View File

@ -301,15 +301,15 @@ Path Type: max
--- find_timing_paths with CRPR ---
Warning 502: search_crpr.tcl line 1, find_timing_paths -endpoint_count is deprecated. Use -endpoint_path_count instead.
Found 3 paths with CRPR
slack=7.3573676040439295e-9 crpr=0.0
slack=7.363725185172143e-9 crpr=0.0
slack=8.43751646328883e-9 crpr=0.0
slack=7.3573676040439295e-9
slack=7.363725185172143e-9
slack=8.43751646328883e-9
--- find_timing_paths min with CRPR ---
Warning 502: search_crpr.tcl line 1, find_timing_paths -endpoint_count is deprecated. Use -endpoint_path_count instead.
Found 3 hold paths with CRPR
slack=-2.327258247225572e-10 crpr=-2.547686020482054e-12
slack=-2.3130949933225509e-10 crpr=-2.547686020482054e-12
slack=7.07958414114529e-10 crpr=-0.0
slack=-2.327258247225572e-10
slack=-2.3130949933225509e-10
slack=7.07958414114529e-10
--- report_check_types ---
Startpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
Endpoint: reg2 (rising edge-triggered flip-flop clocked by clk)

4
search/test/search_crpr.tcl
View File

@ -59,14 +59,14 @@ puts "--- find_timing_paths with CRPR ---"
set paths [find_timing_paths -path_delay max -endpoint_count 3]
puts "Found [llength $paths] paths with CRPR"
foreach pe $paths {
puts " slack=[$pe slack] crpr=[$pe check_crpr]"
puts " slack=[$pe slack]"
}
puts "--- find_timing_paths min with CRPR ---"
set paths_min [find_timing_paths -path_delay min -endpoint_count 3]
puts "Found [llength $paths_min] hold paths with CRPR"
foreach pe $paths_min {
puts " slack=[$pe slack] crpr=[$pe check_crpr]"
puts " slack=[$pe slack]"
}
puts "--- report_check_types ---"

30
search/test/search_crpr_data_checks.ok
View File

@ -440,23 +440,23 @@ fall -> fall
--- find_timing_paths with CRPR ---
Warning 502: search_crpr_data_checks.tcl line 1, find_timing_paths -endpoint_count is deprecated. Use -endpoint_path_count instead.
Found 7 paths
slack=7.334127083424846e-9 crpr=0.0 pin=out1
slack=7.3365340469422335e-9 crpr=0.0 pin=out1
slack=8.43751646328883e-9 crpr=0.0 pin=reg1/D
slack=8.439848819818963e-9 crpr=0.0 pin=reg1/D
slack=8.446774835135784e-9 crpr=0.0 pin=reg1/D
slack=5.46777734200532e-9 crpr=0.0 pin=out2
slack=5.469566577431806e-9 crpr=0.0 pin=out2
slack=7.334127083424846e-9 pin=out1
slack=7.3365340469422335e-9 pin=out1
slack=8.43751646328883e-9 pin=reg1/D
slack=8.439848819818963e-9 pin=reg1/D
slack=8.446774835135784e-9 pin=reg1/D
slack=5.46777734200532e-9 pin=out2
slack=5.469566577431806e-9 pin=out2
--- find_timing_paths min with CRPR ---
Warning 502: search_crpr_data_checks.tcl line 1, find_timing_paths -endpoint_count is deprecated. Use -endpoint_path_count instead.
Found 7 hold paths
slack=-2.327258247225572e-10 crpr=-2.547686020482054e-12
slack=-2.3130949933225509e-10 crpr=-2.547686020482054e-12
slack=7.07958414114529e-10 crpr=-0.0
slack=7.091847664675299e-10 crpr=-0.0
slack=7.135160240423488e-10 crpr=-0.0
slack=1.918010639201384e-9 crpr=-0.0
slack=1.9196295664158924e-9 crpr=-0.0
slack=-2.327258247225572e-10
slack=-2.3130949933225509e-10
slack=7.07958414114529e-10
slack=7.091847664675299e-10
slack=7.135160240423488e-10
slack=1.918010639201384e-9
slack=1.9196295664158924e-9
--- worst_slack by clock ---
worst_slack max: 5.46777734200532e-9
worst_slack min: -2.327258247225572e-10
@ -1503,7 +1503,7 @@ Path Type: min
"target_clock": "clk2",
"target_clock_edge": "rise",
"data_arrival_time": 1.180e-10,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": -2.000e-09,
"required_time": -1.800e-09,
"slack": 1.918e-09

4
search/test/search_crpr_data_checks.tcl
View File

@ -64,14 +64,14 @@ puts "--- find_timing_paths with CRPR ---"
set paths [find_timing_paths -path_delay max -endpoint_count 5]
puts "Found [llength $paths] paths"
foreach pe $paths {
puts " slack=[$pe slack] crpr=[$pe check_crpr] pin=[get_full_name [$pe pin]]"
puts " slack=[$pe slack] pin=[get_full_name [$pe pin]]"
}
puts "--- find_timing_paths min with CRPR ---"
set paths_min [find_timing_paths -path_delay min -endpoint_count 5]
puts "Found [llength $paths_min] hold paths"
foreach pe $paths_min {
puts " slack=[$pe slack] crpr=[$pe check_crpr]"
puts " slack=[$pe slack]"
}
puts "--- worst_slack by clock ---"

6
search/test/search_exception_paths.ok
View File

@ -1001,8 +1001,8 @@ endpoint_slack out1 clk max: Inf
0.02 1.05 v buf1/Z (BUF_X1)
0.00 1.05 v reg1/D (DFFR_X1)
--- report_arrival ---
(clk ^) r 1.04:1.05 f 1.05:1.05
(clk ^) r 1.04:1.05 f 1.05:1.05
--- report_required ---
(clk ^) r 0.00:9.97 f 0.00:9.96
(clk ^) r 0.00:9.97 f 0.00:9.96
--- report_slack ---
(clk ^) r 1.04:8.92 f 1.04:8.91
(clk ^) r 1.04:8.92 f 1.04:8.91

18
search/test/search_fanin_fanout_deep.ok
View File

@ -141,17 +141,17 @@ Fanout 2 inst levels of and2/ZN: 5
inv1/ZN
=== VERTEX/PIN QUERIES ===
--- Pin arrival ---
(clk ^) r 1.13:1.14 f 1.13:1.16
(clk ^) r 0.08:0.08 f 0.08:0.08
(clk ^) r 1.02:1.03 f 1.02:1.02
(clk ^) r 1.00:1.00 f 1.00:1.00
(clk ^) r 0.10:0.10 f 0.10:0.10
(clk ^) r 1.13:1.14 f 1.13:1.16
(clk ^) r 0.08:0.08 f 0.08:0.08
(clk ^) r 1.02:1.03 f 1.02:1.02
(clk ^) r 1.00:1.00 f 1.00:1.00
(clk ^) r 0.10:0.10 f 0.10:0.10
--- Pin required ---
(clk ^) r 0.00:9.97 f 0.00:9.96
(clk ^) r -2.00:8.00 f -2.00:8.00
(clk ^) r 0.00:9.97 f 0.00:9.96
(clk ^) r -2.00:8.00 f -2.00:8.00
--- Pin slack ---
(clk ^) r 1.12:8.83 f 1.13:8.80
(clk ^) r 2.10:7.90 f 2.10:7.90
(clk ^) r 1.12:8.83 f 1.13:8.80
(clk ^) r 2.10:7.90 f 2.10:7.90
--- Pin slack various ---
and1/ZN max rise slack: 8.831884
inv2/ZN min fall slack: 1.130790

4
search/test/search_json_unconstrained.ok
View File

@ -526,7 +526,7 @@ Warning 502: search_json_unconstrained.tcl line 1, report_checks -endpoint_count
}
],
"data_arrival_time": 1.044e-09,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 4.894e-12,
"required_time": 4.894e-12,
"slack": 1.039e-09
@ -624,7 +624,7 @@ Warning 502: search_json_unconstrained.tcl line 1, report_checks -endpoint_count
}
],
"data_arrival_time": 1.044e-09,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 4.894e-12,
"required_time": 4.894e-12,
"slack": 1.039e-09

2
search/test/search_latch_timing.ok
View File

@ -431,7 +431,7 @@ latch1/Q (DFF_X1) reg1/D (DFF_X1) 0.0
}
],
"data_arrival_time": 5.291e-11,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 6.024e-12,
"required_time": 6.024e-12,
"slack": 4.688e-11

3
search/test/search_network_sta_deep.tcl
View File

@ -223,8 +223,7 @@ report_checks -path_delay max -format json
# set_report_path_field_properties (ReportPath.cc)
############################################################
puts "--- set_report_path_field_properties ---"
sta::set_report_path_field_properties "total" "Total" 12 0
sta::set_report_path_field_width "total" 14
sta::set_report_path_field_properties "total" "Total" 14 0
report_checks -path_delay max
############################################################

6
search/test/search_path_delay_output.ok
View File

@ -345,7 +345,7 @@ out1 (output) -2.00 0.10 2.10 (MET)
"target_clock": "clk",
"target_clock_edge": "rise",
"data_arrival_time": 9.857e-11,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": -2.000e-09,
"required_time": -2.000e-09,
"slack": 2.099e-09
@ -811,7 +811,7 @@ reg1/D (DFF_X1) 0.00 1.04 1.04 (MET)
}
],
"data_arrival_time": 1.044e-09,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 4.894e-12,
"required_time": 4.894e-12,
"slack": 1.039e-09
@ -1155,6 +1155,4 @@ is_path_delay: 0
margin: 1.999999943436137e-9
data_arrival: 1.0028596009181712e-10
data_required: 7.999999773744548e-9
source_clk_offset: 0.0
target_clk: clk
target_clk_time: 9.99999993922529e-9

2
search/test/search_path_delay_output.tcl
View File

@ -169,8 +169,6 @@ foreach pe $pe_out {
puts "margin: [$pe margin]"
puts "data_arrival: [$pe data_arrival_time]"
puts "data_required: [$pe data_required_time]"
puts "source_clk_offset: [$pe source_clk_offset]"
puts "target_clk: [get_name [$pe target_clk]]"
puts "target_clk_time: [$pe target_clk_time]"
break
}

5
search/test/search_path_end_types.ok
View File

@ -644,21 +644,16 @@ Found 12 paths
Warning 502: search_path_end_types.tcl line 1, find_timing_paths -endpoint_count is deprecated. Use -endpoint_path_count instead.
is_check: 1
is_output_delay: 0
path_delay_margin_is_external: 0
target_clk_path pin: reg1/CK
is_check: 1
is_output_delay: 0
path_delay_margin_is_external: 0
target_clk_path pin: reg2/CK
is_check: 0
is_output_delay: 1
path_delay_margin_is_external: 0
is_check: 0
is_output_delay: 1
path_delay_margin_is_external: 0
is_check: 0
is_output_delay: 1
path_delay_margin_is_external: 0
--- set_max_delay to create path_delay PathEnd ---
No paths found.
--- Multiple output delays on same pin ---

4
search/test/search_path_end_types.tcl
View File

@ -51,7 +51,7 @@ set paths [find_timing_paths -path_delay max -endpoint_count 3]
foreach pe $paths {
puts " is_check: [$pe is_check]"
puts " is_output_delay: [$pe is_output_delay]"
puts " path_delay_margin_is_external: [$pe path_delay_margin_is_external]"
# path_delay_margin_is_external removed from SWIG interface
set tclkp [$pe target_clk_path]
if { $tclkp != "NULL" } {
puts " target_clk_path pin: [get_full_name [$tclkp pin]]"
@ -64,7 +64,7 @@ report_checks -path_delay max -from [get_ports in1] -to [get_ports out1] -format
set paths_pd [find_timing_paths -from [get_ports in1] -to [get_ports out1] -path_delay max]
foreach pe $paths_pd {
puts " is_path_delay: [$pe is_path_delay]"
puts " path_delay_margin_is_external: [$pe path_delay_margin_is_external]"
# path_delay_margin_is_external removed from SWIG interface
}
unset_path_exceptions -from [get_ports in1] -to [get_ports out1]

9
search/test/search_property_deep.ok
View File

@ -79,18 +79,9 @@ endpoint_clock: clk
margin: 1.999999943436137e-9
data_required_time: 7.999999773744548e-9
data_arrival_time: 1.0361974472905544e-10
source_clk_offset: 0.0
source_clk_latency: 0.0
source_clk_insertion_delay: 0.0
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_offset: 9.99999993922529e-9
target_clk_delay: 0.0
target_clk_insertion_delay: 0.0
target_clk_uncertainty: -0.0
target_clk_arrival: 9.99999993922529e-9
inter_clk_uncertainty: 0.0
check_crpr: 0.0
clk_skew: 0.0
min_max: max
end_transition: ^

9
search/test/search_property_deep.tcl
View File

@ -180,18 +180,9 @@ foreach pe $paths {
puts " margin: [$pe margin]"
puts " data_required_time: [$pe data_required_time]"
puts " data_arrival_time: [$pe data_arrival_time]"
puts " source_clk_offset: [$pe source_clk_offset]"
puts " source_clk_latency: [$pe source_clk_latency]"
puts " source_clk_insertion_delay: [$pe source_clk_insertion_delay]"
puts " target_clk: [get_name [$pe target_clk]]"
puts " target_clk_time: [$pe target_clk_time]"
puts " target_clk_offset: [$pe target_clk_offset]"
puts " target_clk_delay: [$pe target_clk_delay]"
puts " target_clk_insertion_delay: [$pe target_clk_insertion_delay]"
puts " target_clk_uncertainty: [$pe target_clk_uncertainty]"
puts " target_clk_arrival: [$pe target_clk_arrival]"
puts " inter_clk_uncertainty: [$pe inter_clk_uncertainty]"
puts " check_crpr: [$pe check_crpr]"
puts " clk_skew: [$pe clk_skew]"
puts " min_max: [$pe min_max]"
puts " end_transition: [$pe end_transition]"

128
search/test/search_report_fields_formats.ok
View File

@ -1463,7 +1463,6 @@ Warning 502: search_report_fields_formats.tcl line 1, find_timing_paths -endpoin
--- field properties ---
Warning 1575: unknown report path field delay
Warning 1576: unknown report path field delay
Startpoint: reg2 (rising edge-triggered flip-flop clocked by clk1)
Endpoint: out1 (output port clocked by clk1)
Path Group: clk1
@ -1572,115 +1571,6 @@ Path Type: max
1.85 slack (MET)
--- report_path_sigmas ---
Startpoint: reg2 (rising edge-triggered flip-flop clocked by clk1)
Endpoint: out1 (output port clocked by clk1)
Path Group: clk1
Path Type: max
Delay Total Description
---------------------------------------------------------
0.00 0.00 clock clk1 (rise edge)
0.05 0.05 clock network delay (propagated)
0.00 0.05 ^ reg2/CK (DFF_X1)
0.09 0.14 ^ reg2/Q (DFF_X1)
0.02 0.16 ^ buf3/Z (BUF_X1)
0.00 0.16 ^ out1 (out)
0.16 data arrival time
10.00 10.00 clock clk1 (rise edge)
0.00 10.00 clock network delay (propagated)
0.00 10.00 clock reconvergence pessimism
-2.00 8.00 output external delay
8.00 data required time
---------------------------------------------------------
8.00 data required time
-0.16 data arrival time
---------------------------------------------------------
7.84 slack (MET)
Startpoint: reg2 (rising edge-triggered flip-flop clocked by clk1)
Endpoint: reg3 (rising edge-triggered flip-flop clocked by clk2)
Path Group: clk2
Path Type: max
Delay Total Description
---------------------------------------------------------
30.00 30.00 clock clk1 (rise edge)
0.05 30.05 clock network delay (propagated)
0.00 30.05 ^ reg2/CK (DFF_X1)
0.09 30.14 ^ reg2/Q (DFF_X1)
0.00 30.14 ^ reg3/D (DFF_X1)
30.14 data arrival time
32.00 32.00 clock clk2 (rise edge)
0.02 32.02 clock network delay (propagated)
0.00 32.02 clock reconvergence pessimism
32.02 ^ reg3/CK (DFF_X1)
-0.03 31.99 library setup time
31.99 data required time
---------------------------------------------------------
31.99 data required time
-30.14 data arrival time
---------------------------------------------------------
1.85 slack (MET)
Startpoint: reg2 (rising edge-triggered flip-flop clocked by clk1)
Endpoint: out1 (output port clocked by clk1)
Path Group: clk1
Path Type: max
Delay Total Description
---------------------------------------------------------
0.00 0.00 clock clk1 (rise edge)
0.05 0.05 clock network delay (propagated)
0.00 0.05 ^ reg2/CK (DFF_X1)
0.09 0.14 ^ reg2/Q (DFF_X1)
0.02 0.16 ^ buf3/Z (BUF_X1)
0.00 0.16 ^ out1 (out)
0.16 data arrival time
10.00 10.00 clock clk1 (rise edge)
0.00 10.00 clock network delay (propagated)
0.00 10.00 clock reconvergence pessimism
-2.00 8.00 output external delay
8.00 data required time
---------------------------------------------------------
8.00 data required time
-0.16 data arrival time
---------------------------------------------------------
7.84 slack (MET)
Startpoint: reg2 (rising edge-triggered flip-flop clocked by clk1)
Endpoint: reg3 (rising edge-triggered flip-flop clocked by clk2)
Path Group: clk2
Path Type: max
Delay Total Description
---------------------------------------------------------
30.00 30.00 clock clk1 (rise edge)
0.05 30.05 clock network delay (propagated)
0.00 30.05 ^ reg2/CK (DFF_X1)
0.09 30.14 ^ reg2/Q (DFF_X1)
0.00 30.14 ^ reg3/D (DFF_X1)
30.14 data arrival time
32.00 32.00 clock clk2 (rise edge)
0.02 32.02 clock network delay (propagated)
0.00 32.02 clock reconvergence pessimism
32.02 ^ reg3/CK (DFF_X1)
-0.03 31.99 library setup time
31.99 data required time
---------------------------------------------------------
31.99 data required time
-30.14 data arrival time
---------------------------------------------------------
1.85 slack (MET)
--- report_path_no_split ---
Startpoint: reg2 (rising edge-triggered flip-flop clocked by clk1)
Endpoint: out1 (output port clocked by clk1)
@ -3401,7 +3291,7 @@ Warning 502: search_report_fields_formats.tcl line 1, report_checks -endpoint_co
}
],
"data_arrival_time": 1.323e-10,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 6.736e-12,
"required_time": 5.834e-11,
"slack": 7.392e-11
@ -3554,7 +3444,7 @@ Warning 502: search_report_fields_formats.tcl line 1, report_checks -endpoint_co
}
],
"data_arrival_time": 1.298e-10,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 2.987e-12,
"required_time": 5.459e-11,
"slack": 7.521e-11
@ -3667,7 +3557,7 @@ Warning 502: search_report_fields_formats.tcl line 1, report_checks -endpoint_co
}
],
"data_arrival_time": 1.044e-09,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 7.159e-12,
"required_time": 3.264e-11,
"slack": 1.011e-09
@ -3780,7 +3670,7 @@ Warning 502: search_report_fields_formats.tcl line 1, report_checks -endpoint_co
}
],
"data_arrival_time": 1.045e-09,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 7.159e-12,
"required_time": 3.264e-11,
"slack": 1.013e-09
@ -3893,7 +3783,7 @@ Warning 502: search_report_fields_formats.tcl line 1, report_checks -endpoint_co
}
],
"data_arrival_time": 1.046e-09,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 3.301e-12,
"required_time": 2.878e-11,
"slack": 1.017e-09
@ -4027,7 +3917,7 @@ Warning 502: search_report_fields_formats.tcl line 1, report_checks -endpoint_co
}
],
"data_arrival_time": 1.338e-10,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 3.068e-12,
"required_time": 2.597e-11,
"slack": 1.078e-10
@ -4161,7 +4051,7 @@ Warning 502: search_report_fields_formats.tcl line 1, report_checks -endpoint_co
}
],
"data_arrival_time": 1.406e-10,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 7.747e-12,
"required_time": 3.065e-11,
"slack": 1.099e-10
@ -4255,7 +4145,7 @@ Warning 502: search_report_fields_formats.tcl line 1, report_checks -endpoint_co
"target_clock": "clk2",
"target_clock_edge": "rise",
"data_arrival_time": 1.242e-10,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": -2.000e-09,
"required_time": -2.000e-09,
"slack": 2.124e-09
@ -4349,7 +4239,7 @@ Warning 502: search_report_fields_formats.tcl line 1, report_checks -endpoint_co
"target_clock": "clk2",
"target_clock_edge": "rise",
"data_arrival_time": 1.259e-10,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": -2.000e-09,
"required_time": -2.000e-09,
"slack": 2.126e-09

17
search/test/search_report_fields_formats.tcl
View File

@ -102,24 +102,13 @@ foreach pe $paths {
}
############################################################
# set_report_path_field_properties / set_report_path_field_width
# set_report_path_field_properties
############################################################
puts "--- field properties ---"
sta::set_report_path_field_properties "delay" "Delay" 10 0
sta::set_report_path_field_width "delay" 12
sta::set_report_path_field_properties "delay" "Delay" 12 0
report_checks -path_delay max
sta::set_report_path_field_properties "total" "Total" 12 0
sta::set_report_path_field_width "total" 14
report_checks -path_delay max
############################################################
# set_report_path_sigmas
############################################################
puts "--- report_path_sigmas ---"
sta::set_report_path_sigmas 1
report_checks -path_delay max
sta::set_report_path_sigmas 0
sta::set_report_path_field_properties "total" "Total" 14 0
report_checks -path_delay max
############################################################

32
search/test/search_report_gated_datacheck.ok
View File

@ -176,112 +176,112 @@ Total max paths: 16
pin=reg1/RN role=recovery slack=9.553728474998024e-9
margin=-5.372824407601229e-11 data_arr=4.999999858590343e-10 data_req=1.005372851636821e-8
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: ^
min_max: max
type: is_gated=0 is_check=1 is_output=0 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=reg2/RN role=recovery slack=9.553728474998024e-9
margin=-5.372824407601229e-11 data_arr=4.999999858590343e-10 data_req=1.005372851636821e-8
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: ^
min_max: max
type: is_gated=1 is_check=0 is_output=0 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=clk_gate/A2 role=clock gating setup slack=9.499999897855105e-9
margin=0.0 data_arr=4.999999858590343e-10 data_req=9.99999993922529e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: ^
min_max: max
type: is_gated=1 is_check=0 is_output=0 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=clk_gate/A2 role=clock gating setup slack=9.499999897855105e-9
margin=0.0 data_arr=4.999999858590343e-10 data_req=9.99999993922529e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: v
min_max: max
type: is_gated=0 is_check=0 is_output=1 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=out1 role=output setup slack=7.881454600067173e-9
margin=1.999999943436137e-9 data_arr=1.1854504877728544e-10 data_req=7.999999773744548e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: ^
min_max: max
type: is_gated=0 is_check=0 is_output=1 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=out2 role=output setup slack=7.885596176038234e-9
margin=1.999999943436137e-9 data_arr=1.1440334790613349e-10 data_req=7.999999773744548e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: ^
min_max: max
type: is_gated=0 is_check=0 is_output=1 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=out1 role=output setup slack=7.892997366809595e-9
margin=1.999999943436137e-9 data_arr=1.0700216407366625e-10 data_req=7.999999773744548e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: v
min_max: max
type: is_gated=0 is_check=0 is_output=1 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=out2 role=output setup slack=7.895866183105227e-9
margin=1.999999943436137e-9 data_arr=1.0413332002245923e-10 data_req=7.999999773744548e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: v
min_max: max
type: is_gated=0 is_check=0 is_output=1 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=out3 role=output setup slack=7.914771948946964e-9
margin=1.999999943436137e-9 data_arr=8.522769295860044e-11 data_req=7.999999773744548e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: v
min_max: max
type: is_gated=0 is_check=0 is_output=1 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=out3 role=output setup slack=7.92035237395794e-9
margin=1.999999943436137e-9 data_arr=7.964784387581858e-11 data_req=7.999999773744548e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: ^
min_max: max
type: is_gated=0 is_check=1 is_output=0 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=reg1/D role=setup slack=8.908846105271095e-9
margin=3.831846298596453e-11 data_arr=1.0528351523930723e-9 data_req=9.961681257664168e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: v
min_max: max
type: is_gated=0 is_check=1 is_output=0 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=reg1/D role=setup slack=8.909343485186128e-9
margin=3.18987544711824e-11 data_arr=1.0587571930287254e-9 data_req=9.96810101128176e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: ^
min_max: max
type: is_gated=0 is_check=1 is_output=0 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=reg1/D role=setup slack=8.91013662851492e-9
margin=3.831846298596453e-11 data_arr=1.0515442960823407e-9 data_req=9.961681257664168e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: v
min_max: max
type: is_gated=0 is_check=1 is_output=0 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=reg1/D role=setup slack=8.911564819413798e-9
margin=3.18987544711824e-11 data_arr=1.0565358588010554e-9 data_req=9.96810101128176e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: ^
min_max: max
type: is_gated=0 is_check=1 is_output=0 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=reg2/D role=setup slack=9.865935624020494e-9
margin=3.3475701377572165e-11 data_arr=1.0058853056049699e-10 data_req=9.966524494586793e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: ^
min_max: max
type: is_gated=0 is_check=1 is_output=0 is_latch=0 is_data=0 is_path_delay=0 is_uncon=0
pin=reg2/D role=setup slack=9.875192219510609e-9
margin=3.9929969053442704e-11 data_arr=8.487754249442148e-11 data_req=9.960070102010832e-9
target_clk: clk
target_clk_time: 9.99999993922529e-9
target_clk_delay: 0.0
end_transition: v
min_max: max
--- Gated clock all formats ---

2
search/test/search_report_gated_datacheck.tcl
View File

@ -50,7 +50,7 @@ foreach pe $gated_paths {
puts " pin=[get_full_name [$pe pin]] role=[$pe check_role] slack=[$pe slack]"
puts " margin=[$pe margin] data_arr=[$pe data_arrival_time] data_req=[$pe data_required_time]"
puts " target_clk: [get_name [$pe target_clk]]"
puts " target_clk_time: [$pe target_clk_time]"
puts " target_clk_delay: [$pe target_clk_delay]"
puts " end_transition: [$pe end_transition]"
puts " min_max: [$pe min_max]"
}

112
search/test/search_report_json_formats.ok
View File

@ -153,7 +153,7 @@
}
],
"data_arrival_time": 5.291e-11,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 6.024e-12,
"required_time": 6.024e-12,
"slack": 4.688e-11
@ -373,103 +373,53 @@ Warning 502: search_report_json_formats.tcl line 1, find_timing_paths -endpoint_
Found 10 max paths
check=0 latch=1 out=0 gated=0 data=0 unconst=0 role=latch setup
margin=5.49663405069456e-11 req=1.106064906331028e-9 arr=1.106064906331028e-9
target_clk=clk target_time=0.0
src_offset=0.0 tgt_offset=0.0
target_clk=clk
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
inter_clk_uncertainty=0.0
check_crpr=0.0
clk_skew=0.0
check=0 latch=1 out=0 gated=0 data=0 unconst=0 role=latch setup
margin=1.631178005168099e-11 req=1.081046252515705e-9 arr=1.081046252515705e-9
target_clk=clk target_time=0.0
src_offset=0.0 tgt_offset=0.0
target_clk=clk
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
inter_clk_uncertainty=0.0
check_crpr=0.0
clk_skew=0.0
check=0 latch=1 out=0 gated=0 data=0 unconst=0 role=latch setup
margin=5.264827462880817e-11 req=1.0477667622410536e-9 arr=1.0477667622410536e-9
target_clk=clk target_time=0.0
src_offset=0.0 tgt_offset=0.0
target_clk=clk
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
inter_clk_uncertainty=0.0
check_crpr=0.0
clk_skew=0.0
check=0 latch=1 out=0 gated=0 data=0 unconst=0 role=latch setup
margin=5.264827462880817e-11 req=1.0455454280133836e-9 arr=1.0455454280133836e-9
target_clk=clk target_time=0.0
src_offset=0.0 tgt_offset=0.0
target_clk=clk
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
inter_clk_uncertainty=0.0
check_crpr=0.0
clk_skew=0.0
check=0 latch=1 out=0 gated=0 data=0 unconst=0 role=latch setup
margin=1.5100346320573443e-11 req=1.044742847788882e-9 arr=1.044742847788882e-9
target_clk=clk target_time=0.0
src_offset=0.0 tgt_offset=0.0
target_clk=clk
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
inter_clk_uncertainty=0.0
check_crpr=0.0
clk_skew=0.0
check=0 latch=1 out=0 gated=0 data=0 unconst=0 role=latch setup
margin=1.5100346320573443e-11 req=1.0434519914781504e-9 arr=1.0434519914781504e-9
target_clk=clk target_time=0.0
src_offset=0.0 tgt_offset=0.0
target_clk=clk
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
inter_clk_uncertainty=0.0
check_crpr=0.0
clk_skew=0.0
check=0 latch=1 out=0 gated=0 data=0 unconst=0 role=latch setup
margin=5.49663405069456e-11 req=5.6313842478061815e-11 arr=5.6313842478061815e-11
target_clk=clk target_time=0.0
src_offset=0.0 tgt_offset=0.0
target_clk=clk
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
inter_clk_uncertainty=0.0
check_crpr=0.0
clk_skew=0.0
check=0 latch=1 out=0 gated=0 data=0 unconst=0 role=latch setup
margin=1.631178005168099e-11 req=5.290530860624365e-11 arr=5.290530860624365e-11
target_clk=clk target_time=0.0
src_offset=0.0 tgt_offset=0.0
target_clk=clk
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
inter_clk_uncertainty=0.0
check_crpr=0.0
clk_skew=0.0
check=0 latch=0 out=1 gated=0 data=0 unconst=0 role=output setup
margin=1.999999943436137e-9 req=7.999999773744548e-9 arr=1.1867781202212768e-9
target_clk=clk target_time=9.99999993922529e-9
src_offset=0.0 tgt_offset=9.99999993922529e-9
target_clk=clk
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
inter_clk_uncertainty=0.0
check_crpr=0.0
clk_skew=0.0
check=0 latch=0 out=1 gated=0 data=0 unconst=0 role=output setup
margin=1.999999943436137e-9 req=7.999999773744548e-9 arr=1.1316151349305414e-9
target_clk=clk target_time=9.99999993922529e-9
src_offset=0.0 tgt_offset=9.99999993922529e-9
target_clk=clk
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
inter_clk_uncertainty=0.0
check_crpr=0.0
clk_skew=0.0
--- Latch report with fields ---
Startpoint: latch1 (positive level-sensitive latch clocked by clk)
@ -772,7 +722,7 @@ Path Type: max
}
],
"data_arrival_time": 5.000e-10,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 0.000e+00,
"required_time": 5.000e-09,
"slack": -4.500e-09
@ -866,7 +816,7 @@ Path Type: max
}
],
"data_arrival_time": 1.017e-09,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 4.881e-12,
"required_time": 4.881e-12,
"slack": 1.012e-09
@ -989,27 +939,21 @@ Found 6 gated paths
gated=1 check=0 role=clock gating setup slack=9.499999897855105e-9
margin=0.0
target_clk_delay=0.0
target_clk_insertion_delay=0.0
gated=1 check=0 role=clock gating setup slack=9.499999897855105e-9
margin=0.0
target_clk_delay=0.0
target_clk_insertion_delay=0.0
gated=0 check=0 role=output setup slack=7.899713772019368e-9
margin=1.999999943436137e-9
target_clk_delay=0.0
target_clk_insertion_delay=0.0
gated=0 check=0 role=output setup slack=7.901434173618327e-9
margin=1.999999943436137e-9
target_clk_delay=0.0
target_clk_insertion_delay=0.0
gated=0 check=1 role=setup slack=8.939980311595264e-9
margin=3.877912227445712e-11
target_clk_delay=0.0
target_clk_insertion_delay=0.0
gated=0 check=1 role=setup slack=8.952572017051352e-9
margin=3.072002721649092e-11
target_clk_delay=0.0
target_clk_insertion_delay=0.0
--- Gated clock report all formats ---
Startpoint: en (input port clocked by clk)
Endpoint: clk_gate (rising clock gating-check end-point clocked by clk)
@ -1252,7 +1196,7 @@ clk 7.90
"target_clock": "clk",
"target_clock_edge": "rise",
"data_arrival_time": 9.857e-11,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": -8.000e-09,
"required_time": -8.000e-09,
"slack": 8.099e-09
@ -1320,13 +1264,9 @@ Found 2 output delay paths
out=1 check=0 role=output setup slack=1.8997141637555615e-9
margin=7.999999773744548e-9 req=2.000000165480742e-9
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
out=1 check=0 role=output setup slack=1.9014345653545206e-9
margin=7.999999773744548e-9 req=2.000000165480742e-9
target_clk_delay=0.0
target_clk_insertion_delay=0.0
target_clk_uncertainty=-0.0
--- Output delay report all formats ---
Startpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
Endpoint: out1 (output port clocked by clk)
@ -1669,7 +1609,7 @@ clk 1.90
}
],
"data_arrival_time": 5.000e-10,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 1.814e-10,
"required_time": 1.814e-10,
"slack": 3.186e-10
@ -1765,7 +1705,7 @@ clk 1.90
}
],
"data_arrival_time": 8.488e-11,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 2.672e-12,
"required_time": 2.672e-12,
"slack": 8.221e-11
@ -1889,83 +1829,63 @@ Found 20 data check paths
data=0 check=1 role=recovery slack=9.553728474998024e-9
margin=-5.372824407601229e-11
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=1 role=recovery slack=9.553728474998024e-9
margin=-5.372824407601229e-11
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=1 check=0 role=data check setup slack=-5.278119719065444e-9
margin=1.9999998879249858e-10
target_clk_delay=2.2468693572363918e-11
target_clk_uncertainty=-0.0
data=1 check=0 role=data check setup slack=-5.262408730999368e-9
margin=1.9999998879249858e-10
target_clk_delay=2.2468693572363918e-11
target_clk_uncertainty=-0.0
data=1 check=0 role=data check setup slack=-2.760924822098332e-10
margin=1.9999998879249858e-10
target_clk_delay=2.4496025000098065e-11
target_clk_uncertainty=-0.0
data=1 check=0 role=data check setup slack=-2.6038149414375766e-10
margin=1.9999998879249858e-10
target_clk_delay=2.4496025000098065e-11
target_clk_uncertainty=-0.0
data=1 check=0 role=data check setup slack=2.2410170941178365e-10
margin=1.9999998879249858e-10
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=1 check=0 role=data check setup slack=2.3981269747785916e-10
margin=1.9999998879249858e-10
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=0 role=output setup slack=7.881454600067173e-9
margin=1.999999943436137e-9
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=0 role=output setup slack=7.885596176038234e-9
margin=1.999999943436137e-9
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=0 role=output setup slack=7.892997366809595e-9
margin=1.999999943436137e-9
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=0 role=output setup slack=7.895866183105227e-9
margin=1.999999943436137e-9
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=0 role=output setup slack=7.914771948946964e-9
margin=1.999999943436137e-9
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=0 role=output setup slack=7.92035237395794e-9
margin=1.999999943436137e-9
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=1 role=setup slack=8.908846105271095e-9
margin=3.831846298596453e-11
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=1 role=setup slack=8.909343485186128e-9
margin=3.18987544711824e-11
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=1 role=setup slack=8.91013662851492e-9
margin=3.831846298596453e-11
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=1 role=setup slack=8.911564819413798e-9
margin=3.18987544711824e-11
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=1 role=setup slack=9.865935624020494e-9
margin=3.3475701377572165e-11
target_clk_delay=0.0
target_clk_uncertainty=-0.0
data=0 check=1 role=setup slack=9.875192219510609e-9
margin=3.9929969053442704e-11
target_clk_delay=0.0
target_clk_uncertainty=-0.0
--- Data check report all formats ---
Startpoint: rst (input port clocked by clk)
Endpoint: reg1 (recovery check against rising-edge clock clk)

11
search/test/search_report_json_formats.tcl
View File

@ -63,13 +63,8 @@ puts "Found [llength $paths] max paths"
foreach pe $paths {
puts " check=[$pe is_check] latch=[$pe is_latch_check] out=[$pe is_output_delay] gated=[$pe is_gated_clock] data=[$pe is_data_check] unconst=[$pe is_unconstrained] role=[$pe check_role]"
puts " margin=[$pe margin] req=[$pe data_required_time] arr=[$pe data_arrival_time]"
puts " target_clk=[get_name [$pe target_clk]] target_time=[$pe target_clk_time]"
puts " src_offset=[$pe source_clk_offset] tgt_offset=[$pe target_clk_offset]"
puts " target_clk=[get_name [$pe target_clk]]"
puts " target_clk_delay=[$pe target_clk_delay]"
puts " target_clk_insertion_delay=[$pe target_clk_insertion_delay]"
puts " target_clk_uncertainty=[$pe target_clk_uncertainty]"
puts " inter_clk_uncertainty=[$pe inter_clk_uncertainty]"
puts " check_crpr=[$pe check_crpr]"
puts " clk_skew=[$pe clk_skew]"
}
@ -111,7 +106,6 @@ foreach pe $paths_g {
puts " gated=[$pe is_gated_clock] check=[$pe is_check] role=[$pe check_role] slack=[$pe slack]"
puts " margin=[$pe margin]"
puts " target_clk_delay=[$pe target_clk_delay]"
puts " target_clk_insertion_delay=[$pe target_clk_insertion_delay]"
}
puts "--- Gated clock report all formats ---"
@ -152,8 +146,6 @@ foreach pe $paths_od {
puts " out=[$pe is_output_delay] check=[$pe is_check] role=[$pe check_role] slack=[$pe slack]"
puts " margin=[$pe margin] req=[$pe data_required_time]"
puts " target_clk_delay=[$pe target_clk_delay]"
puts " target_clk_insertion_delay=[$pe target_clk_insertion_delay]"
puts " target_clk_uncertainty=[$pe target_clk_uncertainty]"
}
puts "--- Output delay report all formats ---"
@ -201,7 +193,6 @@ foreach pe $paths_dc {
puts " data=[$pe is_data_check] check=[$pe is_check] role=[$pe check_role] slack=[$pe slack]"
puts " margin=[$pe margin]"
puts " target_clk_delay=[$pe target_clk_delay]"
puts " target_clk_uncertainty=[$pe target_clk_uncertainty]"
}
puts "--- Data check report all formats ---"

11
search/test/search_report_path_detail.ok
View File

@ -80,21 +80,10 @@ Warning 502: search_report_path_detail.tcl line 1, find_timing_paths -endpoint_c
data_arrival_time: 1.0028596009181712e-10
check_role: output setup
min_max: max
source_clk_offset: 0.0
source_clk_latency: 0.0
source_clk_insertion_delay: 0.0
target_clk: clk
target_clk_edge exists: 1
target_clk_time: 9.99999993922529e-9
target_clk_offset: 9.99999993922529e-9
target_clk_mcp_adjustment: 0.0
target_clk_delay: 0.0
target_clk_insertion_delay: 0.0
target_clk_uncertainty: -0.0
inter_clk_uncertainty: 0.0
target_clk_arrival: 9.99999993922529e-9
check_crpr: 0.0
target_clk_end_trans: ^
clk_skew: 0.0
--- Path methods ---
arrival: 1.0028596009181712e-10

11
search/test/search_report_path_detail.tcl
View File

@ -64,9 +64,7 @@ foreach pe $path_ends {
puts " data_arrival_time: [$pe data_arrival_time]"
puts " check_role: [$pe check_role]"
puts " min_max: [$pe min_max]"
puts " source_clk_offset: [$pe source_clk_offset]"
puts " source_clk_latency: [$pe source_clk_latency]"
puts " source_clk_insertion_delay: [$pe source_clk_insertion_delay]"
set tclk [$pe target_clk]
if { $tclk != "NULL" } {
puts " target_clk: [get_name $tclk]"
@ -75,16 +73,7 @@ foreach pe $path_ends {
}
set tclke [$pe target_clk_edge]
puts " target_clk_edge exists: [expr {$tclke != "NULL"}]"
puts " target_clk_time: [$pe target_clk_time]"
puts " target_clk_offset: [$pe target_clk_offset]"
puts " target_clk_mcp_adjustment: [$pe target_clk_mcp_adjustment]"
puts " target_clk_delay: [$pe target_clk_delay]"
puts " target_clk_insertion_delay: [$pe target_clk_insertion_delay]"
puts " target_clk_uncertainty: [$pe target_clk_uncertainty]"
puts " inter_clk_uncertainty: [$pe inter_clk_uncertainty]"
puts " target_clk_arrival: [$pe target_clk_arrival]"
puts " check_crpr: [$pe check_crpr]"
puts " target_clk_end_trans: [$pe target_clk_end_trans]"
puts " clk_skew: [$pe clk_skew]"
break
}

4
search/test/search_report_path_expanded.ok
View File

@ -922,7 +922,7 @@ Path Type: min
}
],
"data_arrival_time": 1.323e-10,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 6.736e-12,
"required_time": 5.834e-11,
"slack": 7.392e-11
@ -1016,7 +1016,7 @@ Path Type: min
"target_clock": "clk2",
"target_clock_edge": "rise",
"data_arrival_time": 1.242e-10,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": -2.000e-09,
"required_time": -2.000e-09,
"slack": 2.124e-09

20
search/test/search_report_path_latch_expanded.ok
View File

@ -384,109 +384,91 @@ Max paths: 18
margin: 5.49663405069456e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 1 is_check: 0 slack=0.0
data_arrival: 1.081046252515705e-9 data_required: 1.081046252515705e-9
margin: 1.631178005168099e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 1 is_check: 0 slack=0.0
data_arrival: 1.0477667622410536e-9 data_required: 1.0477667622410536e-9
margin: 5.264827462880817e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 1 is_check: 0 slack=0.0
data_arrival: 1.0455454280133836e-9 data_required: 1.0455454280133836e-9
margin: 5.264827462880817e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 1 is_check: 0 slack=0.0
data_arrival: 1.044742847788882e-9 data_required: 1.044742847788882e-9
margin: 1.5100346320573443e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 1 is_check: 0 slack=0.0
data_arrival: 1.0434519914781504e-9 data_required: 1.0434519914781504e-9
margin: 1.5100346320573443e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 1 is_check: 0 slack=0.0
data_arrival: 5.6313842478061815e-11 data_required: 5.6313842478061815e-11
margin: 5.49663405069456e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 1 is_check: 0 slack=0.0
data_arrival: 5.290530860624365e-11 data_required: 5.290530860624365e-11
margin: 1.631178005168099e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 0 is_check: 0 slack=6.813221542500969e-9
data_arrival: 1.1867781202212768e-9 data_required: 7.999999773744548e-9
margin: 1.999999943436137e-9
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 0 is_check: 0 slack=6.868384527791704e-9
data_arrival: 1.1316151349305414e-9 data_required: 7.999999773744548e-9
margin: 1.999999943436137e-9
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 0 is_check: 0 slack=7.899713772019368e-9
data_arrival: 1.0028596009181712e-10 data_required: 7.999999773744548e-9
margin: 1.999999943436137e-9
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 0 is_check: 0 slack=7.901434173618327e-9
data_arrival: 9.856562094290311e-11 data_required: 7.999999773744548e-9
margin: 1.999999943436137e-9
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 0 is_check: 0 slack=7.923797618047956e-9
data_arrival: 7.620201691871387e-11 data_required: 7.999999773744548e-9
margin: 1.999999943436137e-9
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 0 is_check: 0 slack=7.934120027641711e-9
data_arrival: 6.588010692532009e-11 data_required: 7.999999773744548e-9
margin: 1.999999943436137e-9
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 0 is_check: 1 slack=8.852826915983769e-9
data_arrival: 1.106064906331028e-9 data_required: 9.95889148924789e-9
margin: 4.110847773297621e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 0 is_check: 1 slack=8.88718165725777e-9
data_arrival: 1.081046252515705e-9 data_required: 9.968228020795777e-9
margin: 3.177172414048357e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 0 is_check: 1 slack=9.902577424725223e-9
data_arrival: 5.6313842478061815e-11 data_required: 9.95889148924789e-9
margin: 4.110847773297621e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
is_latch: 0 is_check: 1 slack=9.91532278504792e-9
data_arrival: 5.290530860624365e-11 data_required: 9.968228020795777e-9
margin: 3.177172414048357e-11
source_clk_latency: 0.0
target_clk_delay: 0.0
target_clk_uncertainty: -0.0
--- report_path_ends for latch paths ---
Startpoint: latch1 (positive level-sensitive latch clocked by clk)
Endpoint: latch2 (positive level-sensitive latch clocked by clk)
@ -1966,7 +1948,7 @@ Path Type: max
}
],
"data_arrival_time": 5.291e-11,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 6.024e-12,
"required_time": 6.024e-12,
"slack": 4.688e-11

1
search/test/search_report_path_latch_expanded.tcl
View File

@ -72,7 +72,6 @@ foreach pe $paths_max {
puts " margin: [$pe margin]"
puts " source_clk_latency: [$pe source_clk_latency]"
puts " target_clk_delay: [$pe target_clk_delay]"
puts " target_clk_uncertainty: [$pe target_clk_uncertainty]"
}
############################################################

4
search/test/search_report_path_pvt_cap.ok
View File

@ -394,7 +394,7 @@ clk 0.05
}
],
"data_arrival_time": 5.291e-11,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 6.024e-12,
"required_time": 6.024e-12,
"slack": 4.688e-11
@ -1195,7 +1195,7 @@ Path Type: min
}
],
"data_arrival_time": 5.291e-11,
"crpr": -0.000e+00,
"crpr": 0.000e+00,
"margin": 6.024e-12,
"required_time": 6.024e-12,
"slack": 4.688e-11

4
search/test/search_sta_bidirect_extcap.ok
View File

@ -238,8 +238,8 @@ Load pins
--- write_verilog ---
--- write_sdc ---
--- pocv_enabled ---
pocv_enabled: 0
--- pocv_mode ---
pocv_mode: scalar
--- report_disabled_edges ---
--- set_disable_timing on instance ---
Startpoint: reg1 (rising edge-triggered flip-flop clocked by clk)

4
search/test/search_sta_bidirect_extcap.tcl
View File

@ -127,8 +127,8 @@ write_sdc $s_out
############################################################
# pocv_enabled
############################################################
puts "--- pocv_enabled ---"
puts "pocv_enabled: [sta::pocv_enabled]"
puts "--- pocv_mode ---"
puts "pocv_mode: [sta::pocv_mode]"
############################################################
# report_disabled_edges

24
search/test/search_sta_cmds.ok
View File

@ -1,18 +1,18 @@
--- report_arrival on various pins ---
(clk ^) r 1.04:1.05 f 1.05:1.05
(clk ^) r 0.08:0.08 f 0.08:0.08
(clk ^) r 0.00:0.00 f ---:---
(clk v) r ---:--- f 5.00:5.00
(clk ^) r 1.02:1.03 f 1.02:1.02
(clk ^) r 1.04:1.05 f 1.05:1.05
(clk ^) r 1.00:1.00 f 1.00:1.00
(clk ^) r 0.10:0.10 f 0.10:0.10
(clk ^) r 1.04:1.05 f 1.05:1.05
(clk ^) r 0.08:0.08 f 0.08:0.08
(clk ^) r 0.00:0.00 f ---:---
(clk v) r ---:--- f 5.00:5.00
(clk ^) r 1.02:1.03 f 1.02:1.02
(clk ^) r 1.04:1.05 f 1.05:1.05
(clk ^) r 1.00:1.00 f 1.00:1.00
(clk ^) r 0.10:0.10 f 0.10:0.10
--- report_required on various pins ---
(clk ^) r 0.00:9.97 f 0.00:9.96
(clk ^) r -2.00:8.00 f -2.00:8.00
(clk ^) r 0.00:9.97 f 0.00:9.96
(clk ^) r -2.00:8.00 f -2.00:8.00
--- report_slack on various pins ---
(clk ^) r 1.04:8.92 f 1.04:8.91
(clk ^) r 2.10:7.90 f 2.10:7.90
(clk ^) r 1.04:8.92 f 1.04:8.91
(clk ^) r 2.10:7.90 f 2.10:7.90
--- worst_slack and TNS for each corner ---
Worst slack max: 7.899713995438537
Worst slack min: 1.0391781063125174

33
search/test/search_sta_extra.ok
View File

@ -250,35 +250,6 @@ Path Type: max
--- set_report_path_field_properties ---
Warning 1575: unknown report path field delay
Warning 1576: unknown report path field delay
Startpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
Endpoint: out1 (output port clocked by clk)
Path Group: clk
Path Type: max
Delay Time Description
---------------------------------------------------------
0.00 0.00 clock clk (rise edge)
0.00 0.00 clock network delay (ideal)
0.00 0.00 ^ reg1/CK (DFF_X1)
0.08 0.08 ^ reg1/Q (DFF_X1)
0.02 0.10 ^ buf2/Z (BUF_X1)
0.00 0.10 ^ out1 (out)
0.10 data arrival time
10.00 10.00 clock clk (rise edge)
0.00 10.00 clock network delay (ideal)
0.00 10.00 clock reconvergence pessimism
-2.00 8.00 output external delay
8.00 data required time
---------------------------------------------------------
8.00 data required time
-0.10 data arrival time
---------------------------------------------------------
7.90 slack (MET)
--- set_report_path_sigmas ---
Startpoint: reg1 (rising edge-triggered flip-flop clocked by clk)
Endpoint: out1 (output port clocked by clk)
Path Group: clk
@ -443,8 +414,8 @@ worst_slack_path pin: out1
--- report_path_end with prev_end ---
--- make_instance ---
make_instance: done
--- pocv_enabled ---
pocv_enabled: 0
--- pocv_mode ---
pocv_mode: scalar
--- report_checks -summary format ---
Startpoint Endpoint Slack
--------------------------------------------------------------------------------

14
search/test/search_sta_extra.tcl
View File

@ -50,15 +50,9 @@ report_checks -slack_min -10 -path_delay max
report_checks -slack_max 100 -slack_min -100 -path_delay max
puts "--- set_report_path_field_properties ---"
sta::set_report_path_field_properties "delay" "Delay" 10 0
sta::set_report_path_field_width "delay" 12
sta::set_report_path_field_properties "delay" "Delay" 12 0
report_checks -path_delay max
puts "--- set_report_path_sigmas ---"
sta::set_report_path_sigmas 1
report_checks -path_delay max
sta::set_report_path_sigmas 0
puts "--- find_timing_paths with recovery/removal/gating_setup/gating_hold ---"
sta::set_recovery_removal_checks_enabled 1
sta::set_gated_clk_checks_enabled 1
@ -109,7 +103,7 @@ foreach edge $edges {
foreach tarc $tarcs {
set delays [$edge arc_delays $tarc]
puts "arc_delays count: [llength $delays]"
set dstrs [$edge arc_delay_strings $tarc 3]
set dstrs [$edge arc_delay_strings $tarc 0 3]
puts "arc_delay_strings count: [llength $dstrs]"
set corner2 [sta::cmd_scene]
puts "delay_annotated: [$edge delay_annotated $tarc $corner2 max]"
@ -157,8 +151,8 @@ set and_cell2 [get_lib_cells NangateOpenCellLibrary/AND2_X1]
sta::make_instance new_inst $and_cell2
puts "make_instance: done"
puts "--- pocv_enabled ---"
puts "pocv_enabled: [sta::pocv_enabled]"
puts "--- pocv_mode ---"
puts "pocv_mode: [sta::pocv_mode]"
puts "--- report_checks -summary format ---"
report_checks -path_delay max -format summary

18
search/test/search_tag_path_analysis.ok
View File

@ -1069,15 +1069,15 @@ Path Type: min
--- per-pin tag queries ---
(clk1 ^) r 1.35:1.39 f 1.35:1.36
(gen_clk ^) r 2.07:2.07 f 2.04:2.04
(clk1 ^) r 0.31:10.27 f 0.30:10.26
(gen_clk ^) r 0.31:10.27 f 0.30:10.26
(clk1 ^) r 1.04:8.92 f 1.05:8.91
(gen_clk ^) r 1.76:8.20 f 1.74:8.22
(clk1 ^) r 0.38:0.38 f 0.38:0.38
(clk1 ^) r 0.61:10.27 f 0.60:10.26
(clk1 ^) r -0.22:9.88 f -0.22:9.88
(clk1 ^) r 1.35:1.39 f 1.35:1.36
(gen_clk ^) r 2.07:2.07 f 2.04:2.04
(clk1 ^) r 0.31:10.27 f 0.30:10.26
(gen_clk ^) r 0.31:10.27 f 0.30:10.26
(clk1 ^) r 1.04:8.92 f 1.05:8.91
(gen_clk ^) r 1.76:8.20 f 1.74:8.22
(clk1 ^) r 0.38:0.38 f 0.38:0.38
(clk1 ^) r 0.61:10.27 f 0.60:10.26
(clk1 ^) r -0.22:9.88 f -0.22:9.88
--- clock_skew with generated clock ---
Clock clk1
No launch/capture paths found.

4
search/test/search_worst_slack_sta.ok
View File

@ -532,12 +532,10 @@ Path Type: min
design_power: 6.081859851292393e-7 1.8692128733732716e-8 1.4891682553752617e-7 7.757948878861498e-7 5.41103304385615e-7 5.8966871385734976e-9 7.881983066226894e-8 6.258198368414014e-7 6.708269495447894e-8 1.2795442039248428e-8 7.009699487525722e-8 1.499751363098767e-7 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0 0.0
--- set_report_path_field_properties ---
Warning 1575: unknown report path field delay
Warning 1576: unknown report path field delay
--- set_report_path_sigmas ---
--- set_report_path_no_split ---
--- graph loops ---
--- pocv ---
pocv_enabled: 0
pocv_mode: scalar
--- report_annotated_delay ---
Not
Delay type Total Annotated Annotated

11
search/test/search_worst_slack_sta.tcl
View File

@ -135,15 +135,8 @@ set pwr [sta::design_power [sta::cmd_scene]]
puts "design_power: $pwr"
puts "--- set_report_path_field_properties ---"
sta::set_report_path_field_properties "delay" "Dly" 10 0
sta::set_report_path_field_properties "delay" "Dly" 12 0
report_checks -path_delay max > /dev/null
sta::set_report_path_field_width "delay" 12
report_checks -path_delay max > /dev/null
puts "--- set_report_path_sigmas ---"
sta::set_report_path_sigmas 1
report_checks -path_delay max > /dev/null
sta::set_report_path_sigmas 0
puts "--- set_report_path_no_split ---"
sta::set_report_path_no_split 1
@ -153,7 +146,7 @@ sta::set_report_path_no_split 0
puts "--- graph loops ---"
puts "--- pocv ---"
puts "pocv_enabled: [sta::pocv_enabled]"
puts "pocv_mode: [sta::pocv_mode]"
puts "--- report_annotated_delay ---"
report_annotated_delay

4
search/test/search_write_sdf_model.ok
View File

@ -5,11 +5,11 @@ No differences found.
--- write_sdf with digits ---
Differences found at line 6.
(VERSION "2.7.0")
(VERSION "3.0.0")
(VERSION "3.0.1")
--- write_sdf with include_typ ---
Differences found at line 6.
(VERSION "2.7.0")
(VERSION "3.0.0")
(VERSION "3.0.1")
--- write_timing_model ---
--- write_timing_model with cell_name ---
--- write_timing_model with library_name ---