2019-03-21 18:48:50 +01:00
|
|
|
# 3 corner with +/- 10% derating example
|
2019-03-21 22:17:25 +01:00
|
|
|
define_corners ss tt ff
|
|
|
|
|
read_liberty -corner ss example1_slow.lib
|
|
|
|
|
read_liberty -corner tt example1_typ.lib
|
|
|
|
|
read_liberty -corner ff example1_fast.lib
|
2019-03-21 18:48:50 +01:00
|
|
|
read_verilog example1.v
|
|
|
|
|
link_design top
|
|
|
|
|
set_timing_derate -early 0.9
|
|
|
|
|
set_timing_derate -early 1.1
|
|
|
|
|
create_clock -name clk -period 10 {clk1 clk2 clk3}
|
|
|
|
|
set_input_delay -clock clk 0 {in1 in2}
|
2019-03-21 22:17:25 +01:00
|
|
|
# report all corners
|
2019-03-21 18:48:50 +01:00
|
|
|
report_checks -path_delay min_max
|
2019-03-21 22:17:25 +01:00
|
|
|
# report typical corner
|
|
|
|
|
report_checks -corner tt
|
